MITSUBISHI SEMICONDUCTOR <Single-In-Line Package Intelligent Power Module>

PS21661-RZ/FR

TRANSFER-MOLD TYPE

INSULATED TYPE

Mar. 2004

Fig. 9 TYPICAL SIP-IPM APPLICATION CIRCUIT EXAMPLE

Note 1 : Input signal lines are pulled-down with 4.7k

Ω (min.) internal resistor. If these input lines are susceptible to noise, an RC coupling at

each input is recommended. Input signal voltage is determined by the values of internal pull-down resistor and the external connected

resistor. Set the external resistance value so that input signal voltage exceeds the on-threshold voltage. To prevent the input signals

oscillation, the wiring of each input should be as short as possible.

2: By virtue of integrating the specific type HVIC inside the module, direct coupling to CPU terminals without any opto-coupler or trans-

former isolation is possible.

1k

Ω resistance.

4: Approximately a 0.1~2

µF by-pass capacitor should be used across each power supply connection terminals.

5: To prevent errors of the protection function, the wiring of A should be as short as possible.

6: Each capacitor should be located as close to the pins of the SIP-IPM as possible.

µs.

8: To prevent surge destruction, the wiring between the smoothing capacitor and the P&N1 pins should be as short as possible. Approxi-

mately a 0.1~0.22

µF snubber capacitor between the P&N1 pins is recommended.

C2

C1

HO

LO

VNO

NIN

COM

PIN

CIN

C2

C1

HO

LO

VNO

NIN

COM

PIN

CIN

C2

C1

HO

LO

VNO

NIN

COM

PIN

CIN

CIN

SIP-IPM

M

5V line

15V line

C4

N1

R1

CIN

A

N

P

R2

IC1

IC2

IC3

R2

R3

C3

C3

R2

C3