ADP1763 datasheet(39/62 Pages) AD

39 / 62 page

Data Sheet

LT3074

analog.com

Rev 0.

39 of 62

pin voltage is also measured by the on-chip analog-to-digital converter (ADC). This converted value is scaled back to

the output load current and reported over the PMBus interface using the READ_VOUT command. Do not load the

IMON pin externally. Any parasitic leakages or impedances to or from the IMON pin leads to an error in the measured

output load current.

Unlike most other linear regulators that use the IMON pin, external current limit programming is decoupled from the

current monitoring functionality and the IMON pin on the LT3074. External current limit on the LT3074 can only be

programmed using the IOUT_OC_FAULT_LIMIT command over the PMBus interface. See the IOUT_OC_FAULT_LIMIT

command for additional details on external current limit programming in the LT3074.

Output Overshoot Recovery and Active Discharge

During a load step change from full load to no load (or light load), the output voltage overshoots before the regulator

responds to turn the power transistor off. Given that there is no load (or light load) present at the output, it takes a

long time to discharge the output capacitor.

The LT3074 incorporates an overshoot recovery circuitry that turns on a current sink to discharge the output

capacitor in the event SENSE is higher than SETCAP. This current is typically about 500mA. In addition, if the EN/UV

pin is pulled low, forcing the part in NAP mode, this current sink turns on to enable an active discharge of the OUT

voltage.

If SENSE is externally held more than the SETCAP pin, the current sink turns on in an attempt to restore SENSE to its

programmed voltage. The current sink remains on until the external circuitry releases the SENSE pin.

Direct Paralleling for Higher Output Current

Higher output current is obtained by paralleling multiple LT3074 devices. Connect all SETRES, SETCAP, IN, and BIAS

pins together. Connect the OUT pins together using small pieces of PCB trace or actual sense resistors (used as ballast

resistors) beyond the feedback SENSE tap of each regulator to equalize the currents in LT3074 devices. Keep this

ballast trace area free of solder to maintain a controlled resistance. Table 9 shows the PCB trace resistance in mΩ/in.

The small worst case offset of 2mV for each paralleled LT3074 minimizes the required ballast resistor value. Figure

92 illustrates that two LT3074 devices, each using a 2mΩ PCB trace ballast resistor, provide better than 20% accurate

output current sharing at full load. The two 2mΩ external resistors only add 6mV of output regulation drop with 6A

maximum current. With a 1V output, this voltage drop only adds 0.6% to the regulation accuracy. As discussed

previously, connect the SENSE pin directly to the output capacitor.

Table 9. PC Board Trace Resistance

Weight (oz)

10 mil Width

20 mil Width

54.3

27.1

13.6

Trace resistance is measured in mΩ/in.

In addition, more than two LT3074 devices can be paralleled for even higher output current and lower output noise.

Paralleling multiple LT3074 devices is also useful for spreading heat on the PCB.

PCB Layout Considerations

Given the high bandwidth and high PSRR of LT3074, careful PCB layout must be employed to achieve full device

performance. Figure 87 shows the evaluation board with a layout that delivers the full performance of the regulator.

See the evaluation board for further details.

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