leaking into the board supply. It is imperative to choose an appropriate ferrite bead with very low DC resistance

to provide adequate isolation between the board supply and the chip supply, as well as to maintain a voltage at

the supply terminals that is greater than the minimum voltage required for proper operation.

Figure 8-2 shows the recommended power supply filtering and decoupling method.

10

F

0.1

F

0.1

F

0.1

F

0.1

F

0.1

F

3.3 V

VDD

10

F

0.1

F

3.3 V

VDD_A

2.2

Figure 8-2. Power Supply Decoupling

8.4 Layout

8.4.1 Layout Guidelines

The following section provides the layout guidelines to ensure good thermal performance and power supply

connections for the CDCDB2000.

8.4.2 Layout Examples

Figure 8-3 and Figure 8-4 are PCB layout examples that show the application of thermal design practices and a

low-inductance ground connection between the device DAP and the PCB.

The CDCDB2000 has 85-Ω differential output impedance LP-HCSL format drivers. All transmission lines

connected to CKx pins should be 85-Ω differential impedance, 42.5-Ω single-ended impedance to avoid

reflections and increased radiated emissions. Take care to eliminate or reduce stubs on the transmission lines.

CDCDB2000

SNAS787B – NOVEMBER 2019 – REVISED OCTOBER 2024

www.ti.com

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