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TLE2072ACD 数据表(PDF) 18 Page - Texas Instruments |
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TLE2072ACD 数据表(HTML) 18 Page - Texas Instruments |
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18 / 37 page  TLE2072, TLE2072A, TLE2072Y EXCALIBUR LOW-NOISE HIGH-SPEED JFET-INPUT DUAL OPERATIONAL AMPLIFIERS SLOS124A – JUNE 1993 – REVISED AUGUST 1994 5–18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics at VCC± = ±15 V, TA = 25°C PARAMETER TEST CONDITIONS TLE2072Y UNIT PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIO Input offset voltage VIC = 0, VO = 0, RS = 50 Ω 1.1 6 mV IIO Input offset current VIC =0 VO = 0 See Figure 4 6 100 pA IIB Input bias current VIC = 0, VO = 0, See Figure 4 20 175 pA V Cd i l R50 Ω 15 15 V VICR Common-mode input voltage range RS = 50 Ω 15 to 15 to V ICR pg g S –11 11.9 V Mi i i k l i IO = – 200 µA 13.8 14.1 V VOM + Maximum positive peak output voltage swing IO = – 2 mA 13.5 13.9 V OM + pp p g g IO = – 20 mA 11.5 12.3 V Maximum negative peak IO = 200 µA – 13.8 – 14.2 V VOM – Maximum negative peak output voltage swing IO = 2 mA – 13.5 –14 V OM output voltage swing IO = 20 mA – 11.5 – 12.4 A L i l diff i l l lifi i V10 V RL = 600 Ω 80 96 dB AVD Large-signal differential voltage amplification VO = ± 10 V RL = 2 kΩ 90 109 dB VD gg g p O RL = 10 kΩ 95 118 ri Input resistance VIC = 0 1012 Ω ci Input capacitance VIC = 0, Common mode 7.5 pF ci Input capacitance VIC 0, See Figure 5 Differential 2.5 pF zo Open-loop output impedance f = 1 MHz 80 Ω CMRR Common-mode rejection ratio VIC = VICRmin, VO = 0, RS = 50 Ω 80 98 dB kSVR Supply-voltage rejection ratio ( ∆VCC±/∆VIO) VCC ± = ±5 V to ±15 V, VO = 0, RS = 50 Ω 82 99 dB ICC Supply current (both channels) VO = 0, No load 2.7 3.1 3.6 mA IOS Short circuit output current VO =0 VID = 1 V –30 –45 mA IOS Short-circuit output current VO = 0 VID = – 1 V 30 48 mA PARAMETER MEASUREMENT INFORMATION – + 2 k Ω 2 k Ω RL CL† VO VCC + VCC – VI – + 10 k Ω VO CL† 100 Ω RL VCC + VCC – VI Figure 1. Slew-Rate Test Circuit Figure 2. Unity-Gain Bandwidth and Phase-Margin Test Circuit † Includes fixture capacitance |
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