Stacked CSP technology enables the stacking of a wide range of different

semiconductor devices to deliver the high level of silicon integration and

area efficiency required in portable multi-media products.

Stacked CSP utilizes high-density thin core substrates, advanced materials

(i.e., thin film die attach adhesive, fine filler epoxy mold compound), along

with leading-edge wafer thinning, die attach, wirebonding and molding

capabilities to stack multiple devices in a conventional fine pitch BGA

(FBGA) surface mount component. These advanced assembly capabilities in

combination with Amkor’s expertise in design and test, enable stacks up to

16 active devices while optimizing yield and mounted height requirements.

Customers have relied on Amkor to solve their most complex and highest

density device stack combinations. As a result, Amkor has established

industry leadership in stacking pure memory, mixed signal and logic +

memory devices, including NAND, NOR and DRAM memory, digital base

band or applications processors + high density flash or mobile DRAM

devices. Designers are looking to Stacked CSP technologies to achieve a

high level of integration, along with size and cost reductions in future chip

set combinations.

Applications

SCSP is the best solution to address a range of design requirements,

including:

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Higher memory capacity and more efficient memory architectures

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Smaller, lighter and more innovative product form factors

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Lower cost and more space efficiency

Reliability Qualification

Package Level

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Moisture sensitivity characterization: JEDEC level 3 @ 260°C;

additional test data at: [(30°C/85% RH, 96 hours)+260] x2 or 3

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HAST: 130°C/85% RH, 96 hours

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Temp/Humidity: 85°C/85% RH, 1000 hours

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Temp cycle: -55°C/+125°C, 1000 cycles

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High temp storage: 150°C, 1000 hours

Board Level

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Thermal cycle: -40°C/+125°C, 1000 cycles

The Stacked CSP family leverages Amkor’s industry-leading

ChipArray® Ball Grid Array (CABGA) manufacturing capabilities. This

broad, high-volume infrastructure enables the rapid deployment of

advances in die stacking technology across multiple products and

factories to achieve lowest total cost requirements.

Stacked CSP (SCSP)

DATA SHEET | LAMINATE PRODUCTS

FEATURES

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2-21 mm body size

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Package height down to 0.5 mm

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High die count pure memory, eMMC,

eMCP and MCP

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Design, assembly and test capabilities

that enable stacking of DRAM with

logic or flash memory devices

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Logic/Flash, digital/analog and other

ASIC/memory combinations of 320 I/O

and greater

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Established package infrastructure

with standard CABGA footprints

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Consistent product performance, high

yields and reliability

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JEDEC standard outlines including

MO-192 and MO-219

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Thin DA film and spacer technology,

FoW and FoD

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Extended die overhang wirebonding

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Low loop wirebonding less than 35 µm

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Vacuum transfer and compression

molding

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Wafer thinning/handling to 25 µm

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Pb-free, RoHS compliant and green

materials

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Passive component integration

options