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405GPR 数据表(PDF) 1 Page - Applied Micro Circuits Corporation |
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405GPR 数据表(HTML) 1 Page - Applied Micro Circuits Corporation |
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1 / 57 page ![]() Part Number 405GPr Revision 2.04 – September 7, 2007 AMCC 1 405GPr Power PC 405GPr Embedded Processor Data Sheet Features •PowerPC® 405 32-bit RISC processor core operating up to 400MHz with 16KB I- and D-caches • Synchronous DRAM (SDRAM) interface operating up to 133MHz - 32-bit interface for non-ECC applications - 40-bit interface serves 32 bits of data plus 8 check bits for ECC applications • 4KB on-chip memory (OCM) • External peripheral bus - Flash ROM/Boot ROM interface - Direct support for 8-, 16-, or 32-bit SRAM and external peripherals - Up to eight devices - External Mastering supported • DMA support for external peripherals, internal UART and memory - Scatter-gather chaining supported - Four channels • PCI Revision 2.2 compliant interface (32-bit, up to 66MHz) - Synchronous or asynchronous PCI Bus interface - Internal or external PCI Bus Arbiter • Ethernet 10/100Mbps (full-duplex) support with media independent interface (MII) • Programmable interrupt controller supports 13 external and 19 internal edge triggered or level- sensitive interrupts • Programmable timers • Two serial ports (16550 compatible UART) • One IIC interface • General purpose I/O (GPIO) available • Supports JTAG for board level testing • Internal processor local Bus (PLB) runs at SDRAM interface frequency • Supports PowerPC processor boot from PCI memory • Unique software-accessible 64-bit chip ID number (ECID). Description Designed specifically to address embedded applications, the PowerPC 405GPr (PPC405GPr) provides a high-performance, low-power solution that interfaces to a wide range of peripherals by incorporating on-chip power management features and lower power dissipation requirements. This chip contains a high-performance RISC processor core, SDRAM controller, PCI bus interface, Ethernet interface, control for external ROM and peripherals, DMA with scatter-gather support, serial ports, IIC interface, and general purpose I/O. Technology: CMOS SA-27E, 0.18 μm (0.11 μm L eff) Package: 456-ball (35mm or 27mm) enhanced plastic ball grid array (E-PBGA) in both leaded and lead-free versions Power (typical): 0.72W at 266MHz |
类似零件编号 - 405GPR |
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类似说明 - 405GPR |
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