405GPr – Power PC 405GPr Embedded Processor

38

AMCC

Revision 2.04 – September 7, 2007

Data Sheet

Absolute Maximum Ratings

The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause

permanent damage to the device

Characteristic

Symbol

Value

Unit

Supply Voltage (Internal Logic)

0 to +1.95

V

Supply Voltage (I/O Interface)

0 to +3.6

V

PLL Supply Voltage

0 to +1.95

V

Input Voltage (1.8V CMOS receivers)

V

Input Voltage (3.3V LVTTL receivers)

V

Input Voltage (5.0V LVTTL receivers)

V

Storage Temperature Range

-55 to +150

°C

Case temperature under bias

-40 to +120

°C

Notes:

1. All specified voltages are with respect to GND.

2. Empirical data indicates that all chip voltages should begin to ramp-up within 1 ms of each other. There should never be voltage present

Package Thermal Specifications

E-PBGA packages (leaded and lead-free) in a convection environment are as follows:

Package—Thermal Resistance

Symbol

Airflow

ft/min (m/sec)

Unit

0 (0)

100 (0.51)

200 (1.02)

35mm, 456-balls—Junction-to-Case

θ

JC

222

°C/W

θ

CA

14

13

12

°C/W

27mm, 456-balls—Junction-to-Case

θ

JC

222

°C/W

θ

CA

18

16

15

°C/W

Notes:

1. For a chip mounted on a JEDEC 2S2P card without a heat sink.

2. For a chip mounted on a card with at least one signal and two power planes, the following relationships exist:

3. 333MHz operated at 266MHz or less can operate at +105°C.