11

 2006 Semtech Corp.

www.semtech.com

SC4601

POWER MANAGEMENT

Applications Information - (Cont.)

For a low voltage and high output current application such

dominant and selecting low R

ably improve the efficiency of the converter even though

they give higher switching losses.

The gate charge loss portion of the top/bottom MOSFET’s

total power loss is derived from the SC4601. This gate

charge loss is based on certain operating conditions (f

V

The thermal estimations have to be done for both

MOSFETs to make sure that their junction temperatures

do not exceed their thermal ratings according to their

total power losses P

thermal resistances R

θ

ja

TOTAL

a

(max)

j

R

P

T

T

θ

+

<

Loop Compensation Design:

For a DC/DC converter, it is usually required that the

converter has a loop gain of a high cross-over frequency

for fast load response, high DC and low frequency gain

for low steady state error, and enough phase margin for

its operating stability. Often one can not have all these

properties at the same time. The purpose of the loop

compensation is to arrange the poles and zeros of the

compensation network to meet the requirements for a

specific application.

The SC4601 has an internal error amplifier and requires

the compensation network to connect among the COMP

pin and VSENSE pin, GND, and the output as shown in

Figure 3. The compensation network includes C1, C2,

R1, R7, R8 and C9. R9 is used to program the output

voltage according to:

)

R

R

1

(

8

.

0

V

9

7

OUT

+

⋅

=

Figure 3. Compensation network provides 3 poles and 2

zeros.

For voltage mode step down applications as shown in

Figure 3, the power stage transfer function is:

4

1

2

1

4

C

I

VD

C

L

s

R

L

s

1

C

R

1

s

1

V

)

s

(

G

+

+

⋅

+

=

Where:

R = load resistance and

R

The compensation network will have the characteristic

as follows:

2

P

2

Z

1

P

1

Z

I

COMP

s

1

s

1

s

1

s

1

s

)

s

(

G

ω

+

⋅

ω

+

⋅

ω

+

ω

+

⋅

ω

=

Where:

)

C

C

(

R

1

2

1

7

I

+

⋅

=

ω

2

1

1

Z

C

R

1

⋅

=

ω

9

8

7

2

Z

C

)

R

R

(

1

⋅

+

=

ω

2

1

1

2

1

1

P

C

C

R

C

C

⋅

⋅

+

=

ω

SC4601

VCC

SY NC/SLEEP

COMP

VSENSE

FS

ISET

PHASE

GND

NDRV

PDRV

R9

Output

C1

C2

R1

L1

C9

R8

C4

R7