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ST7LITE2 数据表(PDF) 42 Page - STMicroelectronics |
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ST7LITE2 数据表(HTML) 42 Page - STMicroelectronics |
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42 / 133 page ![]() ST7LITE2 42/133 POWER SAVING MODES (Cont’d) Figure 26. ACTIVE-HALT Timing Overview Figure 27. ACTIVE-HALT Mode Flow-chart Notes: 1. This delay occurs only if the MCU exits ACTIVE- HALT mode by means of a RESET. 2. Peripherals clocked with an external clock source can still be active. 3. Only the RTC1 interrupt and some specific inter- rupts can exit the MCU from ACTIVE-HALT mode. Refer to Table 5, “Interrupt Mapping,” on page 35 for more details. 4. Before servicing an interrupt, the CC register is pushed on the stack. The I bit of the CC register is set during the interrupt routine and cleared when the CC register is popped. 9.6 AUTO WAKE UP FROM HALT MODE Auto Wake Up From Halt (AWUFH) mode is simi- lar to Halt mode with the addition of a specific in- ternal RC oscillator for wake-up (Auto Wake Up from Halt Oscillator). Compared to ACTIVE-HALT mode, AWUFH has lower power consumption (the main clock is not kept running, but there is no ac- curate realtime clock available. It is entered by executing the HALT instruction when the AWUEN bit in the AWUCSR register has been set. Figure 28. AWUFH Mode Block Diagram As soon as HALT mode is entered, and if the AWUEN bit has been set in the AWUCSR register, the AWU RC oscillator provides a clock signal (fAWU_RC). Its frequency is divided by a fixed divid- er and a programmable prescaler controlled by the AWUPR register. The output of this prescaler pro- vides the delay time. When the delay has elapsed the AWUF flag is set by hardware and an interrupt wakes-up the MCU from Halt mode. At the same time the main oscillator is immediately turned on and a 256 or 4096 cycle delay is used to stabilize it. After this start-up delay, the CPU resumes oper- ation by servicing the AWUFH interrupt. The AWU flag and its associated interrupt are cleared by software reading the AWUCSR register. To compensate for any frequency dispersion of the AWU RC oscillator, it can be calibrated by measuring the clock frequency fAWU_RC and then calculating the right prescaler value. Measurement mode is enabled by setting the AWUM bit in the AWUCSR register in Run mode. This connects fAWU_RC to the input capture of the 12-bit Auto-Re- load timer, allowing the fAWU_RC to be measured using the main oscillator clock as a reference time- base. HALT RUN RUN 256 OR 4096 CPU CYCLE DELAY 1) RESET OR INTERRUPT HALT INSTRUCTION FETCH VECTOR ACTIVE [Active Halt Enabled] HALT INSTRUCTION RESET INTERRUPT 3) Y N N Y CPU OSCILLATOR PERIPHERALS 2) IBIT ON OFF 0 OFF FETCH RESET VECTOR OR SERVICE INTERRUPT CPU OSCILLATOR PERIPHERALS 2) IBIT ON OFF X 4) ON CPU OSCILLATOR PERIPHERALS IBIT ON ON X 4) ON 256 OR 4096 CPU CLOCK DELAY (Active Halt enabled) (AWUCSR.AWUEN=0) CYCLE AWU RC AWUFH fAWU_RC AWUFH (ei0 source) oscillator prescaler/1 .. 255 interrupt /64 divider to Timer input capture 1 |
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