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STI5107 数据表(PDF) 4 Page - STMicroelectronics

部件名 STI5107
功能描述  Low-cost interactive set-top box decoder
PDF  14 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STI5107 数据表(HTML) 4 Page - STMicroelectronics

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Description
STi5107
4/14
1.3
Main features
●
Enhanced ST20 32-bit VL-RISC CPU
–
200 MHz, single cycle cache/4-Kbyte instruction cache, 4 Kbyte data cache,
2 Kbyte SRAM
●
Unified memory interface
–
up to166 MHz,16-bit wide SDR/DDR SDRAM interface
●
Programmable flash memory interface
–
4 separately configurable banks, 8/16-bits wide
–
SRAM, peripheral, flash, SFlash™ support
–
support for low cost DVB-CI
●
Programmable transport interface (PTI)
–
single transport stream input
–
support for DVB transport streams
–
integrated DVB, ICAM descramblers
●
MPEG-2 MP@ML video decoder
–
fully programmable horizontal and vertical SRCs
●
Graphics and display
–
3 display planes
–
8 bpp CLUT graphics, 256 x 30 bits (AYCbCr) CLUT entries. 16 bpp true color
graphics, RGB565, ARGB1555, ARGB4444 formats. Link-list control
–
alpha blending, antialiasing, antiflutter, antiflicker filters
–
2D paced blitter engine with fill function
–
blitter based display compositor
–
digital video output: compliant with CCIR 601/CCIR 656
●
PAL/NTSC/SECAM encoder
–
RGB, CVBS, Y/C and YUV outputs with four 10-bit DAC outputs. RGB/CVBS or
YUV/CVBS or YC/CVBS
–
encoding of CGMS, Teletext, WSS, VPS, close caption
●
Audio subsystem
–
MPEG-1 layers I/II
–
simultaneous MPEG audio decode and output of Dolby streams on S/PDIF
–
IEC958/IEC1937 digital audio output interface
–
integrated stereo audio DAC system
●
Central DMA controller
●
On-chip peripherals
–
2 ASCs (UARTs) with Tx and Rx FIFOs
–
3 banks of 8-bit and 1 bank of 7-bit parallel I/O
–
1 smartcard interface and clock generator
–2 SSCs for I2C/SPI master/slave interfaces
–
infrared transmitter/receiver
–
integrated VCXO
–
low-power / RTC / watchdog controller



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