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P912XDP512F0MFVR 数据表(PDF) 598 Page - Freescale Semiconductor, Inc

部件名 P912XDP512F0MFVR
功能描述  Covers, S12XD, S12XB & S12XA Families
PDF  1350 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

P912XDP512F0MFVR 数据表(HTML) 598 Page - Freescale Semiconductor, Inc

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Chapter 16 Interrupt (S12XINTV1)
MC9S12XDP512 Data Sheet, Rev. 2.17
598
Freescale Semiconductor
16.1.4
Block Diagram
Figure 16-1 shows a block diagram of the XINT module.
Figure 16-1. XINT Block Diagram
Wake Up
Current
RQST
IVBR
One Set Per Channel
XGATE
Interrupts
XGATE
Requests
Interrupt
Requests
Interrupt Requests
CPU
Vector
Address
New
IPL
IPL
(Up to 112 Channels)
RQST
DMA Request Route,
PRIOLVLn
Priority Level
= bits from the channel configuration
in the associated configuration register
INT_XGPRIO
= XGATE Interrupt Priority
IVBR
= Interrupt Vector Base
IPL
= Interrupt Processing Level
PRIOLVL0
PRIOLVL1
PRIOLVL2
INT_XGPRIO
Peripheral
Vector
ID
To XGATE Module
Priority
Decoder
Non I Bit Maskable
Channels
Wake up
XGATE
IRQ Channel



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