P912XDP512F0MFVR datasheet(627/1350 Pages) FREESCALE

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Chapter 17 Memory Mapping Control (S12XMMCV2)

MC9S12XDP512 Data Sheet, Rev. 2.17

Freescale Semiconductor

627

17.3.2.8

Program Page Index Register (PPAGE)

Read: Anytime

Write: Anytime

The program page index register allows accessing up to 4 Mbyte of FLASH or ROM in the global memory

map by using the eight page index bits to page 16 Kbyte blocks into the program page window located in

the CPU local memory map from address $8000 to address $BFFF (see Figure 1-16). The CPU has a

special access to read and write this register during execution of CALL and RTC instructions.

CAUTION

XGATE write access to this register during an CPU access which makes use

of this register could lead to unexpected results.

Figure 17-16. PPAGE Address Mapping

NOTE

Writes to this register using the special access of the CALL and RTC

instructions will be complete before the end of the instruction execution.

Address: 0x0030

76543210

PIX7

PIX6

PIX5

PIX4

PIX3

PIX2

PIX1

PIX0

Reset

11111110

Figure 17-15. Program Page Index Register (PPAGE)

Bit14

Bit0

Address [13:0]

PPAGE Register [7:0]

Global Address [22:0]

Bit13

Bit21

Address: CPU Local Address

or BDM Local Address

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