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P912XDP512F0MFVR 数据表(PDF) 801 Page - Freescale Semiconductor, Inc |
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P912XDP512F0MFVR 数据表(HTML) 801 Page - Freescale Semiconductor, Inc |
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801 / 1350 page ![]() Chapter 21 External Bus Interface (S12XEBIV2) MC9S12XDP512 Data Sheet, Rev. 2.17 Freescale Semiconductor 801 21.4.6 Low-Power Options The XEBI does not support any user-controlled options for reducing power consumption. 21.4.6.1 Run Mode The XEBI does not support any options for reducing power in run mode. Power consumption is reduced in single-chip modes due to the absence of the external bus interface. Operation in expanded modes results in a higher power consumption, however any unnecessary toggling of external bus signals is reduced to the lowest indispensable activity by holding the previous states between external accesses. 21.4.6.2 Wait Mode The XEBI does not support any options for reducing power in wait mode. 21.4.6.3 Stop Mode The XEBI will cease to function in stop mode. 21.5 Initialization/Application Information This section describes the external bus interface usage and timing. Typical customer operating modes are normal expanded mode and emulation modes, specifically to be used in emulator applications. Taking the availability of the external wait feature into account the use cases are divided into four scenarios: • Normal expanded mode — External wait feature disabled – External wait feature enabled • Emulation modes – Emulation single-chip mode (without wait states) – Emulation expanded mode (with optional access stretching) Normal single-chip mode and special single-chip mode do not have an external bus. Special test mode is used for factory test only. Therefore, these modes are omitted here. All timing diagrams referred to throughout this section are available in the Electrical Characteristics appendix of the SoC section. |
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