| 数据搜索系统,热门电子元器件搜索 |
|
PCM1609APT 数据表(PDF) 13 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
PCM1609APT 数据表(HTML) 13 Page - Texas Instruments |
|
13 / 43 page ![]() www.ti.com POWER-ON AND EXTERNAL RESET FUNCTIONS Reset Reset Removal VDD 2.4 V 2 V 1.6 V Internal Reset System Clock T0014-08 0 V Don’t Care 1024 System Clocks Reset Removal 1024 System Clocks RST Internal Reset System Clock Reset T0015-06 PCM1609A SLES145A – AUGUST 2005 – REVISED AUGUST 2006 The PCM1609A includes a power-on-reset function, as shown in Figure 20. With the system clock active, and VDD > 2 V (typical, 1.6 V to 2.4 V), the power-on-reset function is enabled. The initialization sequence requires 1024 system clocks from the time VDD > 2 V. After the initialization period, the PCM1609A is set to its reset default state, as described in the Mode Control Registers section of this data sheet. The PCM1609A also includes an external reset capability using the RST input (pin 37). This allows an external controller or master reset circuit to force the PCM1609A to initialize to its reset default state. For normal operation, RST should be set to a logic-1. The external reset operation and timing is shown in Figure 21. The RST pin is set to logic-0 for a minimum of 20 ns. After the initialization sequence is completed, the PCM1609A is set to its reset default state, as described in the Mode Control Registers section of this data sheet. During the reset period (1024 system clocks), the analog outputs are forced to the bipolar zero level (or VCC/2). After the reset period, the internal registers are initialized in the next 1/fS period and, if SCKI, BCK, and LRCK are provided continuously, the PCM1609A provides proper analog output with the group delay time given in the Electrical Characteristics section of this data sheet. The external reset is especially useful in applications where there is a delay between PCM1609A power-up and system-clock activation. In this case, the RST pin should be held at a logic-0 level until the system clock has been activated. Figure 20. Power-On-Reset Timing Figure 21. External Reset Timing 13 Submit Documentation Feedback |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |