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PCM1609APT 数据表(PDF) 16 Page - Texas Instruments |
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PCM1609APT 数据表(HTML) 16 Page - Texas Instruments |
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16 / 43 page ![]() www.ti.com DATA1, DATA2, DATA3, DATA4 t(BCH) 1.4 V BCK LRCK t(BCL) t(LB) t(BCY) t(BL) t(DS) t(DH) T0010-07 1.4 V 1.4 V PCM1609A SLES145A – AUGUST 2005 – REVISED AUGUST 2006 SYMBOL PARAMETER MIN MAX UNITS t(BCY) BCK pulse cycle time 1/(64 fS )(1) t(BCH) BCK high-level time 35 ns t(BCL) BCK low-level time 35 ns t(BL) BCK rising edge to LRCK edge 10 ns t(LB) LRCK falling edge to BCK rising edge 10 ns t(DS) DATA setup time 10 ns t(DH) DATA hold time 10 ns (1) fS is the sampling frequency (e.g., 44.1 kHz, 48 kHz, 96 kHz, etc.) Figure 23. Audio Interface Timing Table 2. Audio Input Data to Analog Output Mapping DATA INPUT CHANNEL ANALOG OUTPUT DATA1 Left VOUT1 DATA1 Right VOUT2 DATA2 Left VOUT3 DATA2 Right VOUT4 DATA3 Left VOUT5 DATA3 Right VOUT6 DATA4 Left VOUT7 DATA4 Right VOUT8 16 Submit Documentation Feedback |
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