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STMPE2401 数据表(PDF) 26 Page - STMicroelectronics |
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STMPE2401 数据表(HTML) 26 Page - STMicroelectronics |
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26 / 55 page ![]() Interrupt system STMPE2401 26/55 9.6 Interrupt status GPIO register (ISGPIOR) ISGPIOR register monitors the status of the interruption from a particular GPIO pin interrupt source to the host. Regardless whether the IEGPIOR bits are enabled or not, the ISGPIOR bits are still updated. The ISG[15:0] bits are the interrupt status bits correspond to the GPIO[15:0] pins. ISGPIOR _lsb Bit 2322 212019181716 IEG 23 IEG 22 IEG 21 IEG 20 IEG 19 IEG 18 IEG 17 IEG 16 R/W RW RWRWRW RW RWRWRW Reset Value 00000 000 ISGPIOR_msb ISGPIOR _lsb Bit 15 14 13 12 11 10 9 8 76543 210 ISG 15 ISG 14 ISG 13 ISG 12 ISG 11 ISG 10 ISG 9 ISG 8 ISG 7 ISG 6 ISG 5 ISG 4 ISG 3 ISG 2 ISG 1 ISG 0 R/W RWRWRWRWRWRW RW RW RW RW RW RW RW RW RW RW Reset Value 0 0 0 0 0 0 00 00000 000 Table 25. GPIO Bits Name Description 23:0 ISG[x] Interrupt Status GPIO (where x = 23 to 0) Read: Interrupt Status of the GPIO[x]. Write: A write to a ISG[x] bit with a value of ‘1’ will clear the interrupt and a write with a value of ‘0’ has no effect on the ISG[x] bit. |
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