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DSILC6-4F2 数据表(PDF) 9 Page - STMicroelectronics |
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DSILC6-4F2 数据表(HTML) 9 Page - STMicroelectronics |
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9 / 11 page ![]() DSILC6-4xx Package information 9/11 Figure 13. Flip-Chip Dimensions Figure 16. Flip-Chip tape and reel specifications In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 14. Flip-Chip footprint Figure 15. Flip-Chip marking 1.1 mm ± 50 µm 315 µm ± 50 500 µm ± 50 650 µm ± 65 Copper pad Diameter : 220µm recommended Solder stencil opening : 330µm recommended Solder mask opening recommendation : 300µm recommended x y x w z w E Dot, ST logo xx = marking yww = datecode (y = year ww = week) z = manufacturing location Dot identifying Pin A1 location User direction of unreeling All dimensions in mm 4 +/- 0.1 4 +/- 0.1 Ø 1.5 +/- 0.1 0.73 +/- 0.05 |
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