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WM8741 数据表(PDF) 39 Page - Wolfson Microelectronics plc

部件名 WM8741
功能描述  24-bit 192kHz DAC with Advanced Digital Filtering
PDF  63 Pages
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制造商  WOLFSON [Wolfson Microelectronics plc]
网页  http://www.wolfsonmicro.com
标志 WOLFSON - Wolfson Microelectronics plc

WM8741 数据表(HTML) 39 Page - Wolfson Microelectronics plc

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WM8741
w
PP Rev 1.3 October 2007
39
DSD MUTE CONTROL
In DSD Direct mode, an analogue mute can be applied at the output of the DAC. This is controlled
by register bit AMUTE.
REGISTER ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R4
Volume Control
04h
7
AMUTE
0
DSD Direct mute control:
0 = mute off
1 = mute on
Table 40 DSD Analogue Mute Control
POWER SAVING STANDBY CONTROL
Setting the PWDN register bit immediately connects all outputs to VMID and resets the digital sections
of the DAC system including the DLL, the audio interface and the DSP. Input data samples are not
preserved, but all control register settings are maintained. When PWDN is cleared the WM8741 will
repeat its power-on initialisation sequence.
REGISTER ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R5
Format Control
05h
7
PWDN
0
Power Down Mode Select:
0 = Normal Mode
1 = Power Down Mode
Table 41 Powerdown Control
HARDWARE CONTROL MODE
When the MODE pin is held ‘low’ the WM8741 is set to hardware control mode and a limited feature
set can be configured.
PIN
NAME
DESCRIPTION
24
MODE/
LRSEL
0 = Hardware control mode
1 = 3-wire serial control mode
Z = 2-wire serial control mode
Table 42 MODE/LRSEL Hardware Control Pin Function
DSD AND PCM MODE SWITCHING
The audio interface mode can be switched between DSD Direct and PCM by controlling the state of
pin DSD. It is recommended that the chip is forced into a MUTE state before dynamically switching
modes.
PIN
NAME
DESCRIPTION
27
SCLK/DSD
0 = PCM Mode
1 = DSD Direct Mode
Table 43 SCLK/DSD Hardware Control Pin Function
AUDIO INPUT FORMAT
Under hardware control, it is possible to select between four different modes of operation for the
PCM audio interface.
PIN NUMBER
28
23
NAME
CSB/SADDR/I2S
IWO/DOUT
DESCRIPTION
0
0
16-bit right justified
0
1
24-bit right justified
1
0
24-bit left justified
STATUS
1
1
24-bit I2S
Table 44 CSB/SADDR/I2S and IWO/DOUT Hardware Control Pin Function



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