ST755C datasheet(7/16 Pages) STMICROELECTRONICS

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ST755C

Application information

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Application information

The ST755 is an IC developed for voltage conversion from an input voltage ranging from

+2.4V to 11V to a regulated adjustable negative output limited by |VO| ≤12.7V - VI. The

circuit adopts a current-mode PWM control scheme to achieve good efficiency, high stability

and low noise performance. The figure in the first page shown the detailed block diagram of

the device.

ST755 is realized in a BCD technology in order to achieve high temperature stability, the

best REFERENCE precision, a very low quiescent current and jitter free operations. The

final stage is built around a 0.7

Ω - 2A P-Channel Power MOS. A fraction of the output

current is splitted out for current detection.Internal clock frequency is fixed to 160KHz. Error

amplifier drives the PWM comparator in order to keep 0V on the CC input. So R3 and R4

resistors are calculated by the following formulae R4 = (|VO|/VREF)*R3 (see Figure 3.). For

R3 can be choose any value between 2KΩ and 20KΩ. Soft-Start (SS) input is a voltage

dependent-output current limit (see Figure 11., Switch Current Limit vs. SS Input Voltage).

SS pin is internally pulled to VREF through a 1.2 MΩ resistor. Applying an appropriate

capacitor at SS input is possible to obtain a soft-start current imitation during power up.

Forcing Soft-Start (SS) input to a lower voltage through a resistive voltage driver (R1 and

R2), the maximum LX current limit can be lowered according the diagram showed in Figure

11. When SHDN input is low, the total current consumption is reduced to 10µA.

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