ADL6332ACCZA-R7 datasheet(27/55 Pages) AD

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Data Sheet

ADL6332

PROGRAMMABILITY GUIDE

analog.com

Rev. A | 27 of 55

The register map can be subdivided into seven functional groups,

as shown in Table 7. See the Register Summary section for a

complete list of all the registers on the ADL6332.

Table 7. Memory Map Functional Groups

Functional Blocks

0x000 to 0x011

SPI configuration

0x100 to 0x101

Function enable

0x104 to 0x109

AMP1 performance trimming and tuning

0x10A to 0x10D

RF path four preconfigurations: AMP1,

AMP2, fixed gain/bypass, DSA attenuation

0x10F to 0x115

AMP2 performance trimming and tuning

0x120 to 0x121

Auxiliary mux selection (debug only), SPI

supply control

Table 7. Memory Map Functional Groups (Continued)

Functional Blocks

0x140 to 0x145

FUSE space. Read only. Trimmed parame-

ters for AMP1 and AMP2 are stored.

FUNCTION AND SIGNAL PATH ENABLE

The enable bits for each circuit block are in registers 0x100 and

0x101 (Table 8 and Table 9). Figure 93 shows a breakdown of the

individual blocks highlighted in red that have corresponding enable

controls in registers 0x100 and 0x101. ENP pin 12 is a primary

enable pin for the ADL6332 and is active high. The bits in the

enable registers can be configured independent of the state of ENP.

Figure 93. Signal Path Enable Block Diagram

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