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ADL6332ACCZA-R7 数据表(PDF) 28 Page - Analog Devices

部件名 ADL6332ACCZA-R7
功能描述  0.38 GHz to 15 GHz RxVGA
PDF  55 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADL6332ACCZA-R7 数据表(HTML) 28 Page - Analog Devices

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Data Sheet
ADL6332
PROGRAMMABILITY GUIDE
analog.com
Rev. A | 28 of 55
Table 8. Register 0x100: Enable Register for MUX and LDO
Bits
Bit Name
Description
Reset
Access
[7:5]
RESERVED
Reserved.
0x0
R
4
AMUX_BG_EN
AMUX Bandgap Enable. If MUXOUT pin 7 is not used, set to 0.
0x1
R/W
0: Disable AMUX Bandgap.
1: Enable AMUX Bandgap.
3
RESERVED
Reserved
0x0
R
2
RESERVED
Reserved
0x0
R/W
1
RESERVED
Reserved
0x0
R
0
LDO18_EN
1.8V LDO Enable for AMUX block. If MUXOUT pin 7 is not used, set to 0.
0x1
R/W
0: Disable
1: Enable
Table 9. Register 0x101: Enable Register for AMP1/AMP2 and DSA
Bits
Bit Name
Description
Reset
Access
[7:3]
RESERVED
Reserved.
0x0
R
2
AMP2_EN
AMP2 Enable .
0x0
R/W
0: Disable
1: Enable
1
RESERVED
DSA Enable.
0x0
R/W
0: Disable
1: Enable
0
LDO18_EN
AMP1 Enable.
0x0
R/W
0: Disable
1: Enable



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