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ADL6332ACCZA-R7 数据表(PDF) 46 Page - Analog Devices

部件名 ADL6332ACCZA-R7
功能描述  0.38 GHz to 15 GHz RxVGA
PDF  55 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADL6332ACCZA-R7 数据表(HTML) 46 Page - Analog Devices

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Data Sheet
ADL6332
REGISTER DETAILS
analog.com
Rev. A | 46 of 55
Table 39. Bit Descriptions for SIG_PATH0_2 (Continued)
Bits
Bit Name
Description
Reset
Access
[5:0]
DSA_ATTN0
DSA Attenuator State 0 Setting.
0x18
R/W
00000: 0dB.
00001: 1dB.
00010: 2dB.
00011: 3dB.
00100: 4dB.
00101: 5dB.
00110: 6dB.
00111: 7dB.
01000: 8dB.
01001: 9dB.
01010: 10dB.
01011: 11dB.
01100: 12dB.
01101: 13dB.
01110: 14dB.
01111: 15dB.
10000: 16dB.
10001: 17dB.
10010: 18dB.
10011: 19dB.
10100: 20dB.
10101: 21dB.
10110: 22dB.
10111: 23dB.
11000: 24dB.
Address: 0x10B, Reset: 0x10, Name: SIG_PATH1_2
Table 40. Bit Descriptions for SIG_PATH1_2
Bits
Bit Name
Description
Reset
Access
7
AMP2_BYPASS1
Amp 2 Bypass State 1 Setting.
0x0
R/W
0: Fixed Gain Mode.
1: Bypass Mode Enable.
6
AMP1_BYPASS1
Amp Bypass State 1 Setting.
0x0
R/W
0: Fixed Gain Mode.
1: Bypass Mode Enable.
[5:0]
DSA_ATTN1
DSA Attenuator State 1 Setting.
0x10
R/W
00000: 0dB.
00001: 1dB.
00010: 2dB.
00011: 3dB.
00100: 4dB.



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