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ADBMS1818ASWAZ-R7 数据表(PDF) 79 Page - Analog Devices

部件名 ADBMS1818ASWAZ-R7
功能描述  18-Cell Battery Monitor with Daisy Chain Interface
PDF  92 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADBMS1818ASWAZ-R7 数据表(HTML) 79 Page - Analog Devices

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Data Sheet
ADBMS1818
APPLICATIONS INFORMATION
analog.com
Rev. B | 79 of 92
if (remainder & 0x4000)
{
remainder = ((remainder << 1));
remainder = (remainder ^ CRC15_POLY)
}
else
{
remainder = ((remainder << 1));
}
}
pec15Table[i] = remainder&0xFFFF;
}
}
unsigned int16 pec15 (char *data , int len)
{
int16 remainder,address;
remainder = 16;//PEC seed
for (int i = 0; i < len; i++)
{
address = ((remainder >> 7) ^ data[i]) & 0xff;//calculate PEC table
address remainder = (remainder << 8 ) ^ pec15Table[address];
}
return (remainder*2);//The CRC15 has a 0 in the LSB so the final
value must be multiplied by 2
}
isoSPI IBIAS and ICMP Setup
The ADBMS1818 allows the isoSPI links of each application to
be optimized for power consumption or for noise immunity. The
power and noise immunity of an isoSPI system is determined by
the programmed IB current, which controls the isoSPI signaling
currents. IB can range from 100 μA to 1 mA. Internal circuitry scales
up this bias current to create the isoSPI signal currents equal to
be 20 × IB. A low IB reduces the isoSPI power consumption in the
ready and active states, whereas a high IB increases the amplitude
of the differential signal voltage VA across the matching termination
resistor, RM. The IB current is programmed by the sum of the RB1
and RB2 resistors connected between the 2 V IBIAS pin and GND,
as shown in Figure 103. The receiver input threshold is set by the
ICMP voltage that is programmed with the resistor divider created
by the RB1 and RB2 resistors. The receiver threshold is half of the
voltage present on the ICMP pin.
The following guidelines must be followed when setting IB (100 μA
to 1 mA) and the receiver comparator threshold voltage VICMP/2:
RM=Transmission Line Cℎaracteristic
 Impedance Z0
Signal Amplitude =
VA =  20 × IB  ×  RM/2
Receiver Comparator Threshold (VTCMP) = K × VA
Voltage on ICMP Pin (VCIMP) = 2 × VTCMP
RB2 = VICMP/IB
RB1 = (2/IB) - (RB2)
Select IB and K (signal amplitude VA to receiver comparator thresh-
old ratio) according to the application:
For lower power links: IB = 0.5 mA and K = 0.5.
For full power links: IB = 1 mA and K = 0.5.
For long links (>50m): IB = 1 mA and K = 0.25.
For applications with little system noise, setting IB to 0.5 mA is a
good compromise between power consumption and noise immuni-
ty. Using this IB setting with a 1:1 transformer and RM = 100 Ω,
RB1 must be set to 3.01 k, and RB2 set to 1 kΩ. With a typical
CAT5 twisted pair, these settings allow communication up to 50 m.
For applications in very noisy environments or that require cables
longer than 50 m, it is recommended to increase IB to 1 mA. Higher
drive current compensates for the increased insertion loss in the
cable and provides high noise immunity. When using cables over
50 m and a transformer with a 1:1 turns ratio and RM = 100 Ω, RB1
is 1.5 k, and RB2 is 499 Ω.
The maximum clock rate of an isoSPI link is determined by the
length of the isoSPI cable. For cables 10 m or less, the maximum
1 MHz SPI clock frequency is possible. As the length of the cable
increases, the maximum possible SPI clock rate decreases. This
dependence is a result of the increased propagation delays that
can create possible timing violations. Figure 102 shows how the
maximum data rate reduces as the cable length increases when
using a CAT5 twisted pair.
Cable delay affects three timing specifications: tCLK, t6, and t7. In
the electrical characteristics table, each of these specifications is
derated by 100 ns to allow for 50 ns of cable delay. For longer
cables, the minimum timing parameters may be calculated as
shown below:
tCLK, t6, and t7 > 0.9 μs + 2 × tCABLE (0.2 m per ns)



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