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SX28AC/DP 数据表(PDF) 30 Page - Parallax Inc |
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SX28AC/DP 数据表(HTML) 30 Page - Parallax Inc |
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30 / 51 page  Parallax SX20AC/SX28AC www.parallax.com © Parallax Inc. Page 30 of 51 Rev 1.6 11/20/2006 14.0 REGISTER STATES UPON DIFFERENT RESET OPERATIONS The effect of different reset operation on a register depends on the register and the type of reset operation. Some registers are initialized to specific values, some are left unchanged, some are undefined, and some are initialized to an unknown value. A register that starts with an unknown value should be initialized by the software to a known value; you cannot simply test the initial state and rely on it starting in that state consistently. Table 14-1 lists the SX registers and shows the state of each register upon different reset. Table 14-1: Register States upon Different Resets Register Power-On Wakeup Brown-Out Watchdog Timer MCLR W Undefined Unchanged Undefined Unchanged Unchanged OPTION FFh FFh FFh FFh FFh MODE 0Fh 0Fh 0Fh 0Fh 0Fh RTCC (01h) Undefined Unchanged Undefined Unchanged Unchanged PC (02h) FFh FFh FFh FFh FFh STATUS (03h) Bits 0-2: undefined Bits 3-4: 11 Bits 5-7: 000 Bits 0-2: unchanged Bits 3-4: unchanged Bits 5-7: 000 Bits 0-4: undefined Bits 5-7: 000 Bits 0-2: unchanged Bits 3-4: (Note 1) Bits 5-7: 000 Bits 0-2: unchanged Bits 3-4: (Note 2) Bits 5-7: 000 FSR (04h) Undefined Bits 0-6: unchanged Bit 7: 1 Bits 0-6: undefined Bit 7: 1 Bits 0-6: unchanged Bit 7: 1 Bits 0-6: unchanged Bit 7: 1 RA/RB/RC Direction FFh FFh FFh FFh FFh RA/RB/RC Data Undefined Unchanged Undefined Unchanged Unchanged Other File Registers SPRAM Undefined Unchanged Undefined Unchanged Unchanged CMP_B Bits 0, 6-7: 1 Bits 1-5: undefined Bits 0, 6-7: 1 Bits 1-5: undefined Bits 0, 6-7: 1 Bits 1-5: undefined Bits 0, 6-7: 1 Bits 1-5: undefined Bits 0, 6-7: 1 Bits 1-5: undefined WKPND_B Undefined Unchanged Undefined Unchanged Unchanged WKED_B FFh FFh FFh FFh FFh WKEN_B FFh FFh FFh FFh FFh ST_B/ST_C FFh FFh FFh FFh FFh LVL_A/LVL_B/LVL_C FFh FFh FFh FFh FFh PLP_A/PLP_B/PLP_C FFh FFh FFh FFh FFh Watchdog Counter Undefined Unchanged Undefined Unchanged Unchanged Note 1: Watchdog reset during Power Down mode: 00(TO, PD); during Active mode: 01 (TO, PD). Note 2: External reset during Power Down mode: 10 (TO, PD); during Active mode, Unchanged ((TO, PD) |
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