bq30z554-R1

SLUSBD4 – OCTOBER 2013

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ELECTRICAL CHARACTERISTICS: SBS Timing Characteristics (continued)

Typical values stated where TA = 25°C and VCC = 14.4 V, Min/Max values stated where TA = –40°C to 85°C and VCC =

3.8 V to 25 V (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Bus free time between start and

tBUF

4.7

µs

stop

tHD:STA

Hold time after (repeated) start

4.0

µs

tSU:STA

Repeated start setup time

4.7

µs

tSU:STO

Stop setup time

4.0

µs

tHD:DAT

Data hold time

300

ns

tSU:DAT

Data setup time

250

ns

tTIMEOUT

Error signal/detect

See (1)

25

35

ms

tLOW

Clock low period

4.7

µs

tHIGH

Clock high period

See (2)

Disabled

tHIGH

Clock high period

See (2)

4.0

50

µs

Cumulative clock low slave extend

tLOW:SEXT

See (3)

25

ms

time

Cumulative clock low master

tLOW:MEXT

See (4)

10

ms

extend time

tF

Clock/data fall time

See (5)

300

ns

tR

Clock/data rise time

See (6)

1000

ns

(1)

The bq30z554-R1 times out when any clock low exceeds tTIMEOUT.

(2)

tHIGH, Max, is the minimum bus idle time. SMBC = 1 for t > 50 µs causes reset of any transaction involving bq30z554-R1 in progress.

This specification is valid when the THIGH_VAL = 0. If THIGH_VAL = 1 then the value of THIGH is set by THIGH_1,2 and the timeout is

not SMBus standard.

(3)

tLOW:SEXT is the cumulative time a slave device is allowed to extend the clock cycles in one message from initial start to the stop.

(4)

tLOW:MEXT is the cumulative time a master device is allowed to extend the clock cycles in one message from initial start to the stop.

(5)

Rise time tR = VILMAX – 0.15) to (VIHMIN + 0.15)

(6)

Fall time tF = 0.9 VDD to (VILMAX – 0.15)

ELECTRICAL CHARACTERISTICS: SBS XL Timing Characteristics

Typical values stated where TA = 25°C and VCC = 14.4 V, Min/Max values stated where TA = –40°C to 85°C and VCC =

3.8 V to 25 V (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

fSMBXL

SMBus XL operating frequency

SLAVE mode

40

400

kHz

Bus free time between start and

tBUF

4.7

µs

stop

tHD:STA

Hold time after (repeated) start

4.0

µs

tSU:STA

Repeated start setup time

4.7

µs

tSU:STO

Stop setup time

4.0

µs

tTIMEOUT

Error signal/detect

See (1)

5

20

ms

tLOW

Clock low period

20

µs

tHIGH

Clock high period

See (2)

20

µs

(1)

The bq30z554-R1 times out when any clock low exceeds tTIMEOUT.

(2)

tHIGH, Max, is the minimum bus idle time.

16

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