Data Sheet

ADRF5051

Silicon SP4T Switch, Nonreflective, 9kHz to 20GHz

Rev. A

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FEATURES

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Wideband frequency range: 9kHz to 20GHz

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Nonreflective design with on-chip 50Ω terminations

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Low insertion loss

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0.7dB typical to 6GHz

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0.9dB typical to 12GHz

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1.2dB typical to 20GHz

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High isolation

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53dB typical to 6GHz

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49dB typical to 12GHz

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47dB typical to 20GHz

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High linearity

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Input P0.1dB: 34dBm typical

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Input IP3: 55dBm typical

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High RF power handling

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Through path: 33dBm up to 20 GHz

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Terminated path: 18dBm up to 20 GHz

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Switching on and off time: 8.5μs

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0.1dB settling time: 15μs

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All off-state control

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Logic select control

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Single-supply operation with derated power handling

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No low frequency spurs, and no internal voltage generation

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24-terminal, 3mm × 3mm, land grid array (LGA) package

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Pin compatible with the ADRF5042, ADRF5043, ADRF5048,

ADRF5049, and ADRF5050

APPLICATIONS

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Test instrumentation

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Military radios, radars, and electronic counter measures (ECMs)

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Microwave radios and very small aperture terminals (VSATs)

FUNCTIONAL BLOCK DIAGRAM

Figure 1. Functional Block Diagram

GENERAL DESCRIPTION

The ADRF5051 is a nonreflective SP4T switch manufactured in a

silicon on insulator (SOI) process.

The ADRF5051 operates from 9kHz to 20GHz with an insertion

loss of lower than 1.20dB and an isolation higher than 47dB. The

device has RF input power handling capability of 33dBm through

path, 18dBm terminated path, and 30dBm hot switching at the RF

common (RFC) port.

The ADRF5051 operates with a dual-supply voltage +3.3V and

−3.3V. The device can also operate with a single positive supply

voltage (VDD) applied while the negative supply pin (VSS) is tied to

ground. In this operating condition, the small signal performance is

maintained while the switching characteristics, linearity, and power

handling performance are derated, see Table 2.

The ADRF5051 employs complimentary metal-oxide semiconductor

(CMOS)- and low voltage transistor to transistor logic (LVTTL)-com-

patible controls.

The device has enable (EN) and logic select (LS) controls. Pulling

the EN pin to high activates an all-off state while pulling the LS pin

high inverts the throw port selection logic, allowing ease of use for

a back-to-back application. See the Theory of Operation section,

Table 7, and the Back-to-Back Application section for additional

information.

The ADRF5051 is pin compatible with the ADRF5042, ADRF5043,

ADRF5048, ADRF5049, and ADRF5050.

The ADRF5051 comes in a 24-terminal, 3mm × 3mm, RoHS com-

pliant, land grid array (LGA) package and can operate from −40°C

to +105°C.