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SN65LBC173AMDREP 数据表(PDF) 3 Page - Texas Instruments |
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SN65LBC173AMDREP 数据表(HTML) 3 Page - Texas Instruments |
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3 / 22 page ![]() 1 1B 16 VCC 2 1A 15 4B 3 1Y 14 4A 4 G 13 4Y 5 2Y 12 G 6 2A 11 3Y 7 2B 10 3A 8 GND 9 3B Not to scale 3 SN65LBC173A-EP www.ti.com SLLSEH1 – NOVEMBER 2016 Product Folder Links: SN65LBC173A-EP Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated 5 Pin Configuration and Functions D Package 16-Pin SOIC Top View Pin Functions PIN I/O DESCRIPTION NAME NO. 1A 2 I RS-485 differential input (noninverting). 1B 1 I RS-485 differential input (inverting). 1Y 3 O Logic level output. 2A 6 I RS-485 differential input (noninverting). 2B 7 I RS-485 differential input (inverting). 2Y 5 O Logic level output. 3A 10 I RS-485 differential input (noninverting). 3B 9 I RS-485 differential input (inverting). 3Y 11 O Logic level output. 4A 14 I RS-485 differential input (noninverting). 4B 15 I RS-485 differential input (inverting). 4Y 13 O Logic level output. G 12 I Active-low select. G 4 I Active-high select. GND 8 — Ground. VCC 16 — Power supply. |
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