G

G

1A

1B

1Y

2A

2B

2Y

3A

3B

3Y

4A

4B

4Y

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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

SN65LBC173A-EP

SLLSEH1 – NOVEMBER 2016

SN65LBC173A-EP Quadruple RS-485 Differential Line Receiver

1

(1)

The signaling rate of a line is the number of voltage

transitions that are made per second expressed in the units

bps (bits per second).

.

1 Features

1

•

Designed for TIA/EIA-485, TIA/EIA-422 and

ISO 8482 Applications

•

Signaling Rates (1) up to 50 Mbps.

•

Fail-Safe in Bus Short-Circuit, Open-Circuit, and

Idle-Bus Conditions

•

ESD Protection on Bus Inputs Exceeds 6 kV

•

Common-Mode Bus Input Range –7 V to 12 V

•

Propagation Delay Times < 18 ns

•

Low-Standby Power Consumption < 32 µA

•

Pin-Compatible Upgrade for AM26LS32,

DS96F173, LTC488, and SN75173

2 Applications

•

Supports Defense, Aerospace, and Medical

Applications

–

Controlled Baseline

–

One Assembly and Test Site

–

One Fabrication Site

–

Extended Product Life Cycle

–

Extended Product-Change Notification

–

Product Traceability

3 Description

The SN65LBC173A is a quadruple differential line

receiver with tri-state outputs, designed for TIA/EIA-

485 (RS-485), TIA/EIA-422 (RS-422), and ISO 8482

(Euro RS-485) applications.

This device is optimized for balanced multipoint bus

communication at data rates up to and exceeding 50

million bits per second. The transmission media may

be twisted-pair cables, printed-circuit board traces, or

backplanes. The ultimate rate and distance of data

transfer

is

dependent

upon

the

attenuation

characteristics of the media and the noise coupling to

the environment.

The receiver operates over a wide range of positive

and negative common-mode input voltages, and

features ESD protection to 6 kV, making it suitable for

high-speed multipoint data transmission applications

in harsh environments. These devices are designed

using

LinBiCMOS®,

facilitating

low-power

consumption and robustness.

The G and G inputs provide enable control logic for

either positive- or negative-logic enabling all four

drivers. When disabled or powered off, the receiver

inputs present a high-impedance to the bus for

reduced system loading.

Device Information(1)

PART NUMBER

PACKAGE

BODY SIZE (NOM)

SN65LBC173A-EP

SOIC (16)

9.90 mm × 3.90 mm

(1) For all available packages, see the orderable addendum at

the end of the data sheet.

Logic Diagram