ISL85415

7. Application Guidelines

FN8373 Rev.5.01

Page 25 of 30

Jun.4.20

The following equations allow calculation of the required capacitance to meet a desired ripple voltage level.

Additional capacitance can be used.

For the ceramic capacitors (low ESR):

where ΔΙ is the inductor’s peak-to-peak ripple current, fSW is the switching frequency and COUT is the output

capacitor.

If using electrolytic capacitors then:

7.7

Loop Compensation Design

When COMP is not connected to VCC, the COMP pin is active for external loop compensation. The ISL85415

uses constant frequency peak current mode control architecture to achieve a fast loop transient response. An

accurate current sensing pilot device in parallel with the upper MOSFET is used for peak current control signal

and overcurrent protection. The inductor is not considered as a state variable since its peak current is constant,

and the system becomes a single order system. It is much easier to design a type II compensator to stabilize the

loop than to implement voltage mode control. Peak current mode control has an inherent input voltage

feed-forward function to achieve good line regulation. Figure 61 shows the small signal model of the synchronous

buck regulator.

Figure 61. Small Signal Model of Synchronous Buck Regulator

Figure 62. Type II Compensator

(EQ. 8)

VOUTripple

I

8fSWCOUT

-----------------------------------

=

(EQ. 9)

VOUTripple I*ESR

=

d

Vin

d

IL

in

in

i

L

+

1:D

L

i

Co

Rc

-Av(S)

d

comp

v

RT

Fm

He(S)

+

Ti(S)

K

o

v

Tv(S)

I

LP

+

1:D

Rc

Ro

-Av(S)

RT

Fm

He(S)

Ti(S)

K

o

T(S)

^

^

V^

^

^

^

^

^

RLP

-

+

R6

V

V

Vo

GM

V

C7

-

+

C6

VREF

VFB

Vo

VCOMP

C3

R2

R3