X24C01API datasheet(9/13 Pages) ICMIC

9 / 13 page

X24C01A

A.C. CONDITIONS OF TEST

Input Pulse Levels

VCC x 0.1 to VCC x 0.9

Input Rise and Fall Times

10ns

Input and Output Timing Levels

VCC x 0.5

3841 PGM T07

Note:

(4)t PUR and tPUW are the delays required from the time VCC is stable until the specified operation can be initiated. These

parameters are periodically sampled and not 100% tested.

3841 FHD F03

EQUIVALENT A.C. LOAD CIRCUIT

3841 FHD F17

5.0V

1533Ο

100pF

Output

Read & Write Cycle Limits

Symbol

Parameter

Min.

Max.

Units

fSCL

SCL Clock Frequency

100

KHz

Noise Suppression Time Constant at SCL, SDA Inputs

100

tAA

SCL Low to SDA Data Out Valid

0.3

3.5

∝

tBUF

Time the Bus Must Be Free Before a New Transmission Can Start

4.7

∝

tHD:STA

Start Condition Hold Time

4.0

∝

tLOW

Clock Low Period

4.7

∝

tHIGH

Clock High Period

4.0

∝

tSU:STA

Start Condition Setup Time

4.7

∝

tHD:DAT

Data In Hold Time

∝

tSU:DAT

Data In Setup Time

250

SDA and SCL Rise Time

∝

SDA and SCL Fall Time

300

tSU:STO

Stop Condition Setup Time

4.7

∝

tDH

Data Out Hold Time

300

3841 PGM T08

A.C. CHARACTERISTICS LIMITS (Over recommended operating conditions unless otherwise specified)

Bus Timing

POWER-UP TIMING

Symbol

Parameter

Max.

Units

tPUR(4)

Power-Up to Read Operation

tPUW(4)

Power-Up to Write Operation

3841 PGM T09

SU:STA

HD:STA

HD:DAT

SU:DAT

LOW

SU:STO

BUF

SCL

SDA IN

SDA OUT

HIGH

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