X24C01A

5

Page Write

The X24C01A is capable of an four byte page write

operation. It is initiated in the same manner as the byte

write operation, but instead of terminating the write cycle after

the first data word is transferred, the master can

transmit up to three more words. After the receipt of each word,

the X24C01A will respond with an acknowledge.

After the receipt of each word, the two low order address bits

are internally incremented by one. The high order

five bits of the address remain constant. If the master should

transmit more than four words prior to generating

the stop condition, the address counter will “roll over” and

the previously written data will be overwritten. As

with the byte write operation, all inputs are disabled until

completion of the internal write cycle. Refer to Figure 6

for the address, acknowledge and data transfer

sequence.

Acknowledge Polling

The disabling of the inputs, during the internal write

operation, can be used to take advantage of the typical

5 ms write cycle time. Once the stop condition is issued to

indicate the end of the host’s write operation the

X24C01A initiates the internal write cycle. ACK polling can

be initiated immediately. This involves issuing the

start condition followed by the slave address for a write

operation. If the X24C01A is still busy with the write

operation no ACK will be returned. If the X24C01A has

completed the write operation an ACK will be returned

and the master can then proceed with the next read or write

operation (See Flow 1).

READ OPERATIONS

Read operations are initiated in the same manner as write

operations with the exception that the R/W bit of the

slave address is set to a one. There are three basic read

operations: current address read, random read and

sequential read.

It should be noted that the ninth clock cycle of the read

operation is not a “don’t care.” To terminate a read

operation, the master must either issue a stop condition

during the ninth cycle or hold SDA HIGH during the ninth

clock cycle and then issue a stop condition.

Flow 1. ACK Polling Sequence

3841 FHD F11

WRITE OPERATION

COMPLETED

ENTER ACK POLLING

ISSUE

START

ISSUE SLAVE

ADDRESS AND R/W = 0

ACK

RETURNED?

NEXT

OPERATION

A WRITE?

ISSUE BYTE

ADDRESS

PROCEED

ISSUE STOP

NO

YES

YES

PROCEED

ISSUE STOP

NO