26 / 48 page

IP1001 LF
Data Sheet
26/48
Dec. 18, 2007
Copyright © 2006, IC Plus Corp.
IP1001-DS-R06
4
Register Descriptions
Abbreviation description
Abbreviation
Description
SC
Self-Clear
LH
Latched High
LL
Latched Low
RO
Read Only
R/W
Read and Write
NA
Not Affected
HW Reset
Reset by RESET# pin
SW Reset
Reset by MII register 0 bit 15
PHY registers
The IP1001 supports a full set of PHY registers, which can be accessed through the MDC/MDIO interface.
Register
Description
Reg0
Control Register
Reg1
Status Register
Reg2
PHY Identifier Register
Reg3
PHY Identifier Register
Reg4
Auto-Negotiation advertise register
Reg5
Link Partner Ability Register
Reg6
Auto-Negotiation Expansion Register
Reg7
Auto-Negotiation Next Page Transmit Register
Reg8
Auto-Negotiation Link Partner Next Page Register
Reg9
1000BASE-T Control Register
Reg10
1000BASE-T Status Register
Reg11~14
Reserved. Do not access to these registers.
Reg15
Extended Status Register
Reg16
PHY Specific Control Register1
Reg17
PHY Link Status Register
Reg18~19
Reserved. Do not access to these registers.
Reg20
PHY Specific Control Register2
Reg21~31
Reserved