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IP1001-DS-R03 数据表(PDF) 40 Page - List of Unclassifed Manufacturers

部件名 IP1001-DS-R03
功能描述  Integrated 10/100/1000 Gigabit Ethernet Transceiver
PDF  48 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  ETC2 [List of Unclassifed Manufacturers]
网页  
标志 ETC2 - List of Unclassifed Manufacturers

IP1001-DS-R03 数据表(HTML) 40 Page - List of Unclassifed Manufacturers

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IP1001 LF
Data Sheet
40/48
Dec. 18, 2007
Copyright © 2006, IC Plus Corp.
IP1001-DS-R06
4.14
PHY Link Status Register (Reg17)
Bit
Name
Description
Type
HW
Reset
SW
Reset
17[8:0]
Reserved
RO
0
17.9
Jabber Detected 0: 10Base Jabber not detected
1: 10Base Jabber detected
RO
0
17.10
APS_Sleep
0: Normal Operation
1: APS sleep mode is entered
RO
0
0: MDI
1: MDIX
MDI
MDIX
1G
100M 10M
1G
100M 10M
MDI0 A
TX
TX
B
RX
RX
MDI1 B
RX
RX
A
TX
TX
MDI2 C
--
--
D
--
--
17.11
MDI/MDIX
MDI3 D
--
--
C
--
--
RO
0
17.12
Link_Duplex
0: link at half duplex
1: link at full duplex
It is valid only if bit 15 is 1.
RO
0
17[14:13] Link_Speed[1:0] 2’b00: link at 10Base-T
2’b01: link at 100Base-TX
2’b10: link at 1000Base-T
2’b11: Reserved
It is valid only if bit 15 is 1.
RO
0
17.15
Link_Status
1: link up
0: link down
RO
0
Register 18~19 are reserved registers. User is inhibited to access to these registers. It may introduce
abnormal function to write these registers.



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