IP1000A LF
Preliminary Data Sheet
12/75
July 5, 2005
Copyright © 2005, IC Plus Corp.
IP1000A LF-DS-R08
Table Assignment of PMA signal to MDI and MDI-X pin-outs
RJ-45 Contact
IP1000A LF
pins
MDI
MDI-X
Abnormal type 1 Abnormal type 2
1
TP_MDI[0]+
BI_DA+
BI_DB+
BI_DA+
BI_DB+
2
TP_MDI[0]-
BI_DA -
BI_DB -
BI_DA -
BI_DB -
3
TP_MDI[1]+
BI_DB+
BI_DA+
BI_DB+
BI_DA+
6
TP_MDI[1]-
BI_DB -
BI_DA -
BI_DB -
BI_DA -
4
TP_MDI[2]+
BI_DC +
BI_DD+
BI_DD+
BI_DC +
5
TP_MDI[2]-
BI_DC -
BI_DD -
BI_DD -
BI_DC -
7
TP_MDI[3]+
BI_DD+
BI_DC+
BI_DC+
BI_DD+
8
TP_MDI[3]-
BI_DD -
BI_DC -
BI_DC -
BI_DD -
2.1.4.3
Auto-Negotiation and Next Page Exchange
When the IP1000A LF is not set in forced mode, Auto-Negotiation automatically configures IP1000A LF
for 1000BASE-T/100BASE-TX/10BASE-T, full/half duplex, and master/slave operation based on the
highest common factor of both link capabality.
IP1000A LF is able to perform next page exchanges. This function can be turned on/off manually by
changing the register setting (PHY register 4.15). The content of the next page is based on PHY registers
7 and 8, respectively. When IP1000A LF is operated in 1000BASE-T, the next page exchanges are
automatically turned on.
2.1.5
Smart Cable Analyzer (SCA™)
To simplify the Gigabit link establishment, the IP1000A LF incorporates the “Smart Cable Analyzer”
(SCA™) feature . This feature helps to make cable diagnosis an easy task for end users. If there is an
improperly installed cable, the signal quality can be severly deteriorated to prevent from achieving a high
SNR, which as result this leads to a poor networking performance. Furthermore, if the cable is
open-circuited or short-circuited in any pair of wires, a Gigabit link is impossible.
SCA can detect opens, shorts or impedance mismatch of a cable. It can also pinpoint the distance of the
problematic segment to enable a quick troubleshooting.
2.1.6
Smart Speed Downshift
A normal CAT5 cable has four pairs of wires. However, there exist some legacy cables with only two
pairs of wires sufficient for a successful 100Mbps or 10Mbps operation. With the such cables, two
Gigabit devices can agree on 1000Mbps speed via Auto-Negotiation but will never set up a successful
link. The IP1000A LF can detect this “hangup” condition and downshifts to 100Mbps speed after several
repeated failed tries in 1000 Mbps mode.
The default downshift feature is turned on. It can be turned off by setting PHY register 16.11 to “0”.
2.2
PCI
The PCI Bus Interface (PBI) implements the procedures and algorithms needed to link the IP1000A LF to
a PCI bus. The IP1000A LF can be either a PCI bus master or slave. The PBI is also responsible for
managing the DMA interfaces and the host processor accessing to the IP1000A LF registers. The PBI
also manages interrupt generation for a host processor.
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
