IP1000A LF
Preliminary Data Sheet
46/75
July 5, 2005
Copyright © 2005, IC Plus Corp.
IP1000A LF-DS-R08
Bit
BIT Name
BIT Description
Type
HW
Reset
SW
Reset
adding (on frame transmission) or removing (on
frame reception) the VLAN tag automatically.
An UpdateStats interrupt (UpdateStats bit within
the
IntStatus
register)
will
occur
when
OctetXmtOk reaches a value of 0xC0000000.
OctetXmtOk is enabled by writing a logic 1 to the
StatisticsEnable bit in the MACCtrl register, and a
logic
0
to
the
OctetXmtOk
bit
within
the
StatisticsMask register.
3.2.1.25 SingleColFrames
Class............................. Ethernet MIB Statistics
I/O Base Address ......... IoBaseAddress register value
Memory Base Address . MemBaseAddress register value
Address Offset .............. 0xF0
Default Value ................ 0x00000000
Access Rule.................. Double Word
Width ............................ 32 bits
Bit
BIT Name
BIT Description
Type
HW
Reset
SW
Reset
31..0
SingleColFrames Single Collision Frames is a count of the number
of frames that are involved in a single collision,
and are subsequently transmitted successfully.
SingleColFrames will wrap around to zero after
reaching 0xFFFFFFFF. See IEEE 802.3 Clause
30.3.1.1.3.
An UpdateStats interrupt (UpdateStats bit within
the
IntStatus
register)
will
occur
when
SingleColFrames
reaches
a
value
of
0xC0000000. SingleColFrames is enabled by
writing a logic 1 to the StatisticsEnable bit in the
MACCtrl
register,
and
a
logic
0
to
the
SingleColFrames bit within the StatisticsMask
register.
R/W
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