24 / 60 page
IP175A LF
Preliminary Data Sheet
Serial management interface (SMI)
User can access IP175A LF’s MII registers through serial management interface with pin MDC and
MDIO. A specific pattern on MDIO is used to access a MII register. Its format is shown in the following
table. When the SMI is idle, MDIO is in high impedance. To initialize the MDIO interface, the
management entity sends a sequence of 32 contiguous “1” and “start” on MDIO.
CPU
MDI
O
175A LF
MDC
Syatem diagram
Frame format
<Idle><start><op code><PHY address><Registers address><turnaround>
<data><idle>
Read Operation
<Idle><01><10><A4A3A2A1A0><R4R3R2R1R0><Z0>
<b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1b0><Idle>
Write Operation
<Idle><01><01><A4A3A2A1A0><R4R3R2R1R0><10>
<b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1b0><Idle>
0
0
0
0
0
0
0
0
1
1
0
0
1
1
0
0
0
1
0
0
0
0
0
1
0
0
0
0
1
0
1
0
1..1
idle
start
op
code
PHY address =
01h
Reg address =
00h
TA
Register data
b
1
5
b
1
4
b
1
3
b
1
2
b
1
1
b
1
0
b
9
b
8
b
7
b
6
b
5
b
4
b
3
b
2
b
1
b
0
idle
A
4
A
3
A
2
A
1
A
0
R
4
R
3
R
2
R
1
R
0
write
z
z
0
0
0
0
0
0
0
0
1
0
0
0
1
1
0
0
0
Z
0
0
0
0
0
1
0
0
0
0
0
1
1
0
idle
start
op
code
PHY address =
01h
Reg address =
00h
TA
Register data
b
1
5
b
1
4
b
1
3
b
1
2
b
1
1
b
1
0
b
9
b
8
b
7
b
6
b
5
b
4
b
3
b
2
b
1
b
0
idle
A
4
A
3
A
2
A
1
A
0
R
4
R
3
R
2
R
1
R
0
read
z
zz
MDC
MDIO
MDC
MDIO
1..1
1..1
1..1
24/60
February 20, 2006
Copyright © 2004, IC Plus Corp.
IP175A LF-DS-R08
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
