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IP1000ALF-DS-R08 数据表(PDF) 11 Page - List of Unclassifed Manufacturers

部件名 IP1000ALF-DS-R08
功能描述  Gigabit Ethernet NIC Single Chip
PDF  75 Pages
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制造商  ETC2 [List of Unclassifed Manufacturers]
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标志 ETC2 - List of Unclassifed Manufacturers

IP1000ALF-DS-R08 数据表(HTML) 11 Page - List of Unclassifed Manufacturers

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IP1000A LF
Preliminary Data Sheet
11/75
July 5, 2005
Copyright © 2005, IC Plus Corp.
IP1000A LF-DS-R08
2.1.2.3
Echo Canceller
With the proprietary architecture, the adaptive digital echo canceller further reduces the residual echo not
removed by the hybrid, the reflection due to patch cord impedance mismatch and non-ideal cable
characteristics.
2.1.2.4
NEXT Canceller
When IP1000A LF is operated in 1000BASE-T mode, it uses 4 pairs of wires to transmit and receive data
at the same time. This results in a detrimental near-end crosstalk between adjacent pairs and
significantly impairs the receiver performance. An adaptive digital NEXT canceller is implemented in
IP1000A LF to mitigate this effect.
2.1.2.5
Baseline Wander Canceller
IP1000A LF implements a digital adaptive baseline wander cancellation circuit to compensate DC shifts,
which are result of the DC loss from the transformer.
2.1.2.6
Feed-Forward Equalizer (FFE) and Decision-Feedback Equalizer (DFE)
The FFE and DFE of IP1000A LF are designed to remove inter-symbol interference. These fully adaptive
filters can track the inherently time-variant channel environment.
2.1.2.7
Digital Timing Recovery
IP1000A LF adopts a digital timing recovery scheme to accurately acquire the timing information at the
receiver side. This advanced digital timing recovery block reduces both long-term and short-term
frequency jitter to achieve as low bit error rate as possible. The maximum frequency offset it can track far
exceeds the requirement of the IEEE standard.
2.1.2.8
Decoder
The IP1000A LF implements different decoders for 1000BASE-T, 100BASE-TX, and 10BASE-T
respectively.
2.1.3
Transmit Function
2.1.3.1
Digital to Analog Converter (DAC)
The IP1000A LF incorporates a hightly integrated DAC to transmit Normal Link Pulse (NLP), Fast Link
Pulse (FLP), Manchester coded symbols, MLT3 waveform, or partial response PAM5 signals.
2.1.3.2
Encoder
The IP1000A LF implements different encoders for 1000BASE-T, 100BASE-TX, and 10BASE-T
respectively.
2.1.4
Link Function
2.1.4.1
Medium Dependent Interface (MDI)
The IP1000A LF transmits and receives data with all four pairs of wires in 1000BASE-T mode. If the
IP1000A LF is operated in 100BASE-TX or 10BASE-T mode, only one pair is responsible for transmitting
and the other for receiving data.
2.1.4.2
Automatic MDI/MDI-X Crossover and Pair Polarity Correction
The IP1000A LF is able to correct pair polarity errors in all modes. The automatic crossover function will
adjust MDI/MDI-X crossover condition for proper operation. In addition, the IP1000A LF can also correct
two types of abnormal cable configuration not compliant with the IEEE 802.3ab standard. This function
can be turned off by setting PHY register 20.2 to “0”.



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