
IP175C/IP175C LF/IP175CH/IP175CH LF
Data Sheet
98/111
Mar 09, 2007
Copyright © 2004, IC Plus Corp.
IP175C/IP175CH-DS-R14
MII1, MII1 and MII2 control register
PHY
MII
ROM
R/W
Description
Default
31
5.15
7.0
R/W P4EXT
1: enable
0: disable (default)
Pin74
31
5.14
--
RO
SMI0_polling
1: MII0 MAC mode, 0: MII0 PHY mode
31
5.13
--
RO
SMI1_polling
1: MII1 MAC mode, 0: MII1 PHY mode
31
5.12
7.4
R/W MII1_PHY_MOD
1: MII1 is connected to PHY4.0: MII1 is connected to MAC4.
Pin54(1)
MII0_mac_mode_en
External MII0 port MAC mode
1: MII0 works as a MAC and should be connected to an
external PHY.
0: MII0 works as a PHY and should be connected to an
external MAC device (default).
This bit does not affect MII1 port.
Default value
MII2_EN=1
MII2_EN=0
31
5.11
60.2
R/W
0
Pin96 MII0_MAC_MODE (0)
*
MII0_RMII_EN
1: MII0 RMII interface enabled
0: MII0 RMII interface disabled (default).
Default value
P4EXT=1 & RMII_EN=1
Others
31
5.10
60.3
R/W
1
0
Pin(0)
MII2_RMII_EN
1: MII2 RMII interface enabled
0: MII2 RMII interface disabled (default).
Default value
P4EXT=1 & RMII_EN=1 & MII2_EN=1
Others
31
5.9
3.5
R/W
1
0
*
MII1_RMII_EN
1: MII1 RMII interface enabled
0: MII1 RMII interface disabled (default).
Default value
P4EXT=1 & RMII_EN=1 & MII1_DIS=0
Others
31
5.8
3.4
R/W
1
0
*
31
5.7
3.3
R/W MII1OR2_MAC_REPEATER
1: external PHY ‘s TXEN does not loop back to CRS (default)
0: external PHY ‘s TXEN loop back to CRS
1
31
5.6
3.2
R/W MII0_MAC_REPEATER
1: external PHY ‘s TXEN does not loop back to CRS (default)
0: external PHY ‘s TXEN loop back to CRS
1