PIC16LF18323 datasheet(58/489 Pages) MICROCHIP

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PIC16(L)F18324/18344

DS40001800C-page 58

 2015-2017 Microchip Technology Inc.

4.5

Indirect Addressing

The INDFn registers are not physical registers. Any

instruction that accesses an INDFn register actually

accesses the register at the address specified by the

File Select Registers (FSR). If the FSRn address

specifies one of the two INDFn registers, the read will

return ‘0’ and the write will not occur (though Status bits

may be affected). The FSRn register value is created

by the pair FSRnH and FSRnL.

The FSR registers form a 16-bit address that allows an

addressing space with 65536 locations. These locations

are divided into four memory regions:

• Traditional/Banked Data Memory

• Linear Data Memory

• Program Flash Memory

• EEPROM

4.5.1

TRADITIONAL/BANKED DATA

MEMORY

The banked data memory is a region from FSR

address 0x000 to FSR address 0xFFF. The addresses

correspond to the absolute addresses of all SFR, GPR

and common registers.

FIGURE 4-8:

INDIRECT ADDRESSING

0x0000

PC value = 0x000

PC value = 0xFFF

0x8FFF

0x0000

0x1FFF

0x2000

0X2FEF

0X2FF0

0x7FFF

0x8000

Reserved

Traditional

Data Memory

Linear

Data Memory

Program

Flash Memory

FSR

Address

Range

Rev. 10-000044B

9/16/2016

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