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数据搜索系统，热门电子元器件搜索 |
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PIC16LF18323 数据表(PDF) 7 Page - Microchip Technology |
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PIC16LF18323 数据表(HTML) 7 Page - Microchip Technology |
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7 / 489 page  TABLE 2: 20-PIN ALLOCATION TABLE (PIC16(L)F18344) RA0 19 16 ANA0 — C1IN0+ — DAC1OUT — — — — — — — — — IOC Y ICDDAT ICSPDAT RA1 18 15 ANA1 VREF+ C1IN0- C2IN0- —DAC1REF+— — —— — —— — — IOC Y ICDCLK ICSPCLK RA2 17 14 ANA2 VREF- — — DAC1REF- — T0CKI(1) CCP3(1) — CWG1IN(1) CWG2IN(1) — — CLCIN0(1) — IOC INT(1) Y — RA3 4 1 — — —— — — — — — — — — — — IOC Y MCLR VPP RA4 3 20 ANA4 — — — — — T1G(1) T3G(1) T5G(1) SOSCO CCP4(1) — — — — — — IOC Y CLKOUT OSC2 RA5 2 19 ANA5 — —— — — T1CKI(1) T3CKI(1) T5CKI(1) SOSCIN SOSCI —— — — — — — IOC Y CLKIN OSC1 RB4 13 10 ANB4 — — — — — — — — — SDI1(1) SDA1(1,3,4) — CLCIN2(1) — IOC Y — RB5 12 9 ANB5 — — — — — — — — — —RX(1) CLCIN3(1) — IOC Y — RB6 11 8 ANB6 — — — — — — — — — SCK1(1) SCL1(1,3,4) — — — IOC Y — RB7 10 7 ANB7 — — — — — — — — — —— — — IOC Y — RC0 16 13 ANC0 — C2IN0+ — — — — — — — — — — — IOC Y — RC1 15 12 ANC1 — C1IN1- C2IN1- —— — — — — — — — — — IOC Y — RC2 14 11 ANC2 — C1IN2- C2IN2- — — MDCIN1(1) — — — — — — — — IOC Y — Note 1: Default peripheral input. Input can be moved to any other pin with the PPS input selection registers. 2: All pin outputs default to PORT latch data. Any pin can be selected as a digital peripheral output with the PPS output selection registers. 3: These peripheral functions are bidirectional. The output pin selections must be the same as the input pin selections. 4: These pins are configured for I2C logic levels; clock and data signals may be assigned to any of these pins. Assignments to other pins (e.g. RA5) will operate, but logic levels will be standard TTL/ST as selected by the INLVL register. |
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