1.8 ± 10% V

B1

B2

A1

A2

GND

LSF0002

RA1 =

1k

RA2 =

1k

1.8V Device

1.2V Device

1.2 ± 10% V

VBIAS

0.1 F

RB1 =

1k

RB2 =

1k

6

5

2

1

3

4

VEXT,A

VEXT,B

Figure 8-4. 1.2V to 1.8V Level Translation with LSF0002

8.3 Power Supply Recommendations

There are no power sequence requirements for the LSF family. Table 8-4 provides recommended operating

voltages for all supply and input pins.

Table 8-4. Recommended Operating Voltages

PARAMETER

MIN

TYP

MAX

UNIT

VEXT,A (1)

reference voltage (A)

0.9

5.5

V

VEXT,B

reference voltage (B)

VEXT,A + 0.8

5.5

V

VBIAS

input voltage on EN pin

VEXT,A

VEXT,A + 0.8

V

VPU

pull-up supply voltage

0

VEXT,B

V

(1)

VEXT,A is required to be the lowest voltage level across all inputs and outputs.

8.4 Layout

8.4.1 Layout Guidelines

Because the LSF family is a switch-type level translator, the signal integrity is highly related with a pull-up

resistor and PCB capacitance condition. Therefore, do as follows:

• Short the signal trace as short as possible to reduce capacitance and minimize stub from the pull-up resistor.

• Place the LSF device as close to the high voltage side as possible.

• Select the appropriate pull-up resistor that applies to translation levels and the driving capability of the

transmitter.

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LSF0002

SDLS975 – APRIL 2024

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