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STMPE1601 数据表(PDF) 19 Page - STMicroelectronics

部件名 STMPE1601
功能描述  16-bit enhanced port expander with keypad and PWM controller Xpander Logic
PDF  58 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STMPE1601 数据表(HTML) 19 Page - STMicroelectronics

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STMPE1601
System controller
19/58
7.1
States of operation
Figure 4.
Modes of operation
The device has three main modes of operation:
Operational mode: This is the mode, whereby normal operation of the device takes
place. In this mode, the RC4M clock is available and the main FSM unit routes this
clock and the 32 KHz clock to all the device blocks that are enabled. In this mode,
individual blocks that need not to
be working can be turned off by the master by programming the bits 3 to 0 of the
SYS_CTRL register.
Sleep mode: In this low-power mode, the 4MHz RC oscillator is powered down. All the
blocks which need clocks derived from the 32KHz clock will continue getting a 32 KHz
clock. In this mode also, iindividual blocks can be turned off by the master by
programming the bits 3 to 0 of the SYS_CTRL register. However, the master needs to
program the SYS_CTRL register before coming into this mode, as in the sleep mode,
the IIC interface is not active except to detect traffic for wakeup. Any activity on the I2C
port (intended I2C transaction for the device) or Wakeup pin or Hotkey activity will
cause the device to leave this mode and go into the Operational mode. When leaving
this mode, the I2C will need to hold the SCLK till the RC4M clock is ready.
Hibernate mode: This mode is entered when the system writes a ‘1’ to bit 5 of the
SYS_CTRL register. In this mode, the device is completely inactive as there is
absolutely no clock. Only a Reset or a wakeup on IIC will bring back the System to
operational mode. A keypress detect will bring the system to Sleep mode, in which the
debounce of the key will take place.
Note:
The 32 kHz clock mentioned in this section can be (1) an externally fed 32 KHz clock, or (2)
an internally generated (from RC OSC) clock. In case the internal clock is used, the clock
has a range of 25 to 45 KHz.
OPERATIONAL
SLEEP
2
Set Disable_32K bit
Reset
HIBERNATE
32K: OFF
RC: OFF
Set Sleep bit
or autosleep
Valid Keypress
detect
I
2
C transaction
Keypad, Interrupts
&
I C transaction
32K: ON
RC: OFF
32K: ON
RC: OFF



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