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ADC3421 数据表(PDF) 32 Page - Texas Instruments

部件名 ADC3421
功能描述  ADC342x Quad-Channel, 12-Bit, 25-MSPS to 125-MSPS, Analog-to-Digital Converter
PDF  80 Pages
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制造商  TI2 [Texas Instruments]
网页  https://www.ti.com
标志 TI2 - Texas Instruments

ADC3421 数据表(HTML) 32 Page - Texas Instruments

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Input Clock Duty Cycle (%)
30
35
40
45
50
55
60
65
70
70.3
82
70.5
84
70.7
86
70.9
88
71.1
90
71.3
92
D429
SNR
SFDR
Input Clock Duty Cycle (%)
30
35
40
45
50
55
60
65
70
69.8
82
70
84
70.2
86
70.4
88
70.6
90
70.8
92
D430
SNR
SFDR
Differential Clock Amplitude (Vpp)
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
2.2
66
90
68
93
70
96
72
99
74
102
76
105
D427
SNR
SFDR
Differential Clock Amplitude (Vpp)
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
2.2
64
76
66
80
68
84
70
88
72
92
74
96
D428
SNR
SFDR
Temperature (°C)
-40
-15
10
35
60
85
80
84
88
92
96
100
D425
DVDD = 1.7 V
DVDD = 1.75 V
DVDD = 1.8 V
DVDD = 1.85 V
DVDD = 1.9 V
Temperature (°C)
-40
-15
10
35
60
85
69.5
69.9
70.3
70.7
71.1
71.5
D426
DVDD = 1.7 V
DVDD = 1.75 V
DVDD = 1.8 V
DVDD = 1.85 V
DVDD = 1.9 V
ADC3421, ADC3422, ADC3423, ADC3424
SBAS673A – JULY 2014 – REVISED OCTOBER 2015
www.ti.com
Typical Characteristics: ADC3423 (continued)
Typical values are at TA = 25°C, ADC sampling rate = 80 MSPS, 50% clock duty cycle, AVDD = 1.8 V, DVDD = 1.8 V, –1-
dBFS differential input, 2-VPP full-scale, 32k-point FFT, chopper disabled, and SNR reported with a 1-MHz offset from dc
when chopper is disabled and from fS / 2 when chopper is enabled, unless otherwise noted.
Figure 85. Spurious-Free Dynamic Range vs
Figure 86. Signal-to-Noise Ratio vs
DVDD Supply and Temperature (170 MHz)
DVDD Supply and Temperature (170 MHz)
Figure 87. Performance vs Clock Amplitude (40 MHz)
Figure 88. Performance vs Clock Amplitude (150 MHz)
Figure 89. Performance vs Clock Duty cycle (30 MHz)
Figure 90. Performance vs Clock Duty Cycle (150 MHz)
32
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Copyright © 2014–2015, Texas Instruments Incorporated
Product Folder Links: ADC3421 ADC3422 ADC3423 ADC3424



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