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ADC3421 数据表(PDF) 4 Page - Texas Instruments

部件名 ADC3421
功能描述  ADC342x Quad-Channel, 12-Bit, 25-MSPS to 125-MSPS, Analog-to-Digital Converter
PDF  80 Pages
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制造商  TI2 [Texas Instruments]
网页  https://www.ti.com
标志 TI2 - Texas Instruments

ADC3421 数据表(HTML) 4 Page - Texas Instruments

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ADC3421, ADC3422, ADC3423, ADC3424
SBAS673A – JULY 2014 – REVISED OCTOBER 2015
www.ti.com
Pin Functions
PIN
I/O
DESCRIPTION
NAME
NO.
6, 7, 10, 11, 14,
AVDD
15, 20, 23, 28, 29,
I
Analog 1.8-V power supply
32, 33, 36
CLKM
21
I
Negative differential clock input for the ADC
CLKP
22
I
Positive differential clock input for the ADC
DA0M
4
O
Negative serial LVDS output for wire-0 of channel A
DA0P
3
O
Positive serial LVDS output for wire-0 of channel A
DA1M
2
O
Negative serial LVDS output for wire-1 of channel A
DA1P
1
O
Positive serial LVDS output for wire-1 of channel A
DB0M
56
O
Negative serial LVDS output for wire-0 of channel B
DB0P
55
O
Positive serial LVDS output for wire-0 of channel B
DB1M
54
O
Negative serial LVDS output for wire-1 of channel B
DB1P
53
O
Positive serial LVDS output for wire-1 of channel B
DC0M
46
O
Negative serial LVDS output for wire-0 of channel C
DC0P
45
O
Positive serial LVDS output for wire-0 of channel C
DC1M
44
O
Negative serial LVDS output for wire-1 of channel C
DC1P
43
O
Positive serial LVDS output for wire-1 of channel C
DD0M
42
O
Negative serial LVDS output for wire-0 of channel D
DD0P
41
O
Positive serial LVDS output for wire-0 of channel D
DD1M
40
O
Negative serial LVDS output for wire-1 of channel D
DD1P
39
O
Positive serial LVDS output for wire-1 of channel D
DCLKM
51
O
Negative bit clock output
DCLKP
50
O
Positive bit clock output
DVDD
5, 38, 47, 52
I
Digital 1.8-V power supply
FCLKM
49
O
Negative frame clock output
FCLKP
48
O
Positive frame clock output
GND
PowerPAD™
I
Ground, 0 V
INAM
8
I
Negative differential analog input for channel A
INAP
9
I
Positive differential analog input for channel A
INBM
13
I
Negative differential analog input for channel B
INBP
12
I
Positive differential analog input for channel B
INCM
30
I
Negative differential analog input for channel C
INCP
31
I
Positive differential analog input for channel C
INDM
35
I
Negative differential analog input for channel D
INDP
34
I
Positive differential analog input for channel D
Power-down control. This pin can be configured via the SPI. This pin has an internal
PDN
37
I
150-k
Ω pulldown resistor.
RESET
24
I
Hardware reset; active high. This pin has an internal 150-k
Ω pulldown resistor.
SCLK
16
I
Serial interface clock input. This pin has an internal 150-k
Ω pulldown resistor.
SDATA
17
I
Serial interface data input. This pin has an internal 150-k
Ω pulldown resistor.
SDOUT
19
O
Serial interface data output
Serial interface enable; active low.
SEN
18
I
This pin has an internal 150-k
Ω pullup resistor to AVDD.
SYSREFM
26
I
Negative external SYSREF input
SYSREFP
25
I
Positive external SYSREF input
VCM
27
O
Common-mode voltage for analog inputs
4
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Copyright © 2014–2015, Texas Instruments Incorporated
Product Folder Links: ADC3421 ADC3422 ADC3423 ADC3424



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