| 数据搜索系统,热门电子元器件搜索 |
|
MB85AS8MT 数据表(PDF) 8 Page - RAMXEED LIMITED |
|
|
|||||||||||||||||||||||||||||
MB85AS8MT 数据表(HTML) 8 Page - RAMXEED LIMITED |
|
8 / 30 page ![]() MB85AS8MT 8 DS501-00060-2v2-E READ The READ command reads ReRAM memory cell array data. Arbitrary 24 bits address and op-code of READ are input to SI. The 4-bit upper address bit is invalid. Then, 8-cycle clock is input to SCK. SO is output synchronously to the falling edge of SCK. While reading, the SI value is invalid. When CS is risen, the READ command is completed, but keeps on reading with automatic address increment which is enabled by con- tinuously sending clocks to SCK in unit of 8 cycles before CS rising. When it reaches the most significant address, it rolls over to the starting address, and reading cycle keeps on infinitely. WRITE The WRITE command writes data to ReRAM memory cell array. WRITE op-code, arbitrary 24 bits of address and 8 bits of writing data are input to SI. The 4-bit upper address bit is invalid. During the CS is low, input writing data are temporary saved in the data register. The maximum writing data size is 256 bytes during this CS = low period. If the input writing data are more than 8 bits, it is possible to continue writing with automatic address increment. When it reaches the most significant address, it rolls over to the starting address, and writing cycle can be continued up to 256 bytes (which is the size of data register). Data exceed 256 bytes can not be written. After rising edge of CS, MB85AS8MT starts writing operation to nonvolatile memory and set WIP bit in status register to “1”. After this writing operation has finished, reset this WIP bit from “1” to “0”. Although the RDSR command is executable for WIP polling during this writing process, any other commands will not be per- formed. CS SCK SI Invalid MSB LSB MSB Data Out LSB High-Z Invalid 45 0123 26 27 6 7 8 9 10 11 12 13 14 15 38 39 28 29 30 31 32 33 34 35 36 37 00000011 X 32 XXX 18 17 16 54 SO 76 3 10 54 210 24-bit Address OP-CODE 19 CS SCK Data In SI MSB 24-bit Address OP-CODE LSB MSB LSB High-Z 10 11 0123456789 14 15 26 31 32 12 13 27 28 29 30 33 34 35 36 37 38 39 0000001 3 0 XXXX 2 1 0 SO 18 17 16 5 4 3 2 1 0 7654 19 |
|
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |