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MB85AS8MT 数据表(PDF) 2 Page - RAMXEED LIMITED |
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MB85AS8MT 数据表(HTML) 2 Page - RAMXEED LIMITED |
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2 / 30 page ![]() MB85AS8MT 2 DS501-00060-2v2-E PIN ASSIGNMENT PIN FUNCTIONAL DESCRIPTIONS Pin Name Functional description CS Chip Select pin This is an input pin to make chips select. When CS is “H” level, device is in deselect (standby) status and SO becomes High-Z. Inputs from other pins are ignored for this time. When CS is “L” level, device is in select (active) status. CS has to be “L” level before inputting op-code. SCK Serial Clock pin This is a clock input pin to input/output serial data. SI is loaded synchronously to a rising edge, SO is output synchronously to a falling edge. SI Serial Data Input pin This is an input pin of serial data. This inputs op-code, address, and writing data. SO Serial Data Output pin This is an output pin of serial data. Reading data of ReRAM memory cell array and status register data are output. This is High-Z during standby. VDD Supply Voltage pin VSS Ground pin (BOTTOM VIEW) 11-pin WLP Type-A VSS VSS VSS VSS VSS VSS VSS VDD SI/SO SCK CS VSS VSS VSS VSS VSS VSS VDD SI SO SCK CS 11-pin WLP Type-B 11-pin WLP Type-C |
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