AMC7832IPAP datasheet(49/74 Pages) TI2

49 / 74 page

AMC7832

www.ti.com

SLAS836 – MARCH 2014

Table 30. Register name: ADCn-Data (high byte) – Address: 0x20 - 0x41, Default: 0x00 (READ ONLY)

DEFAULT

ADDRESS

BIT

NAME

DESCRIPTION

NAME

VALUE

ADCn Data

0x20 to

7:4

Reserved

Reserved for factory use

All zeros

(high)

0x41

3:0

ADCn-DATA

Stores the 12-bit ADC_n conversion results in straight binary

All zeros

(11:8)

format for both types of inputs channels (unipolar and bipolar).

8.5.8 DAC Data: Address 0x50 – 0x67

Table 31. Register name: DACn-Data (low byte) – Address: 0x50 - 0x67, Default: 0x00 (READ/WRITE)

DEFAULT

ADDRESS

BIT

NAME

DESCRIPTION

NAME

VALUE

DACn Data

0x50 to

7:0

DACn-DATA(7:0)

Stores the 12-bit data to be loaded to the DAC_n latches in

All zeros

(low)

0x67

straight binary format. The straight binary format is used for both

DAC ranges: -10 to 0V and 0 to 10V.

Table 32. Register name: DACn-Data (high byte) – Address: 0x50 - 0x67, Default: 0x00 (READ/WRITE)

DEFAULT

ADDRESS

BIT

NAME

DESCRIPTION

NAME

VALUE

DACn Data

0x50 to

7:4

Reserved

Reserved for factory use

All zeros

(high)

0x67

3:0

DACn-DATA

Stores the 12-bit data to be loaded to the DAC_n latches in

All zeros

(11:8)

straight binary format. The straight binary format is used for both

DAC ranges: -10 to 0V and 0 to 10V.

8.5.9 Status Registers: Address 0x70 – 0x72

The AMC7832 continuously monitors all unipolar analog inputs and local temperature sensor during normal

operation. When any input is out of the specified range N consecutive times, the corresponding alarm bit is set

('1'). If the input returns to the normal range before N consecutive times, the corresponding alarm bit remains

clear ('0'). This configuration avoids any false alarms. When an alarm status occurs, the corresponding alarm bit

is set ('1'). When the corresponding bit in the ALARMOUT Source Registers is cleared ('0'), the ALARMOUT

terminal is latched. Whenever an alarm status bit is set, it remains set until the event that caused it is resolved

and its status register is read. Reading the Alarm Status Registers clears the alarm status bits. The alarm bit can

only be cleared by reading its Alarm Status register after the event is resolved, or by hardware reset, software

reset, or power-on reset. All alarm status bits are cleared when reading the Alarm Status registers, and all these

bits are reasserted if the out-of-limit condition still exists after the next conversion cycle, unless otherwise noted.

Table 33. Register name: Register name: Alarm Status 0 – Address: 0x70, Default: 0x00 (READ ONLY)

DEFAULT

ADDRESS

BIT

NAME

DESCRIPTION

NAME

VALUE

Alarm

0X70

7:5

Reserved

Reserved for factory use

000

Status 0

ADC16-ALR

ADC16-ALR = '1' when ADC16 is out of the range defined by the

corresponding threshold registers. ADC16-ALR = '0' when the