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DRV8874PWPRG4 数据表(PDF) 10 Page - Texas Instruments |
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DRV8874PWPRG4 数据表(HTML) 10 Page - Texas Instruments |
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10 / 42 page ![]() Forward Reverse OUT1 OUT2 1 2 Forward drive Slow decay (brake) VM OUT1 OUT2 1 2 2 Reverse drive Slow decay (brake) VM 3 High-Z (coast) 3 High-Z (coast) 2 1 3 3 2 1 10 DRV8874 SLVSF66A – AUGUST 2019 – REVISED DECEMBER 2019 www.ti.com Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated 7.3 Feature Description 7.3.1 External Components Table 1 lists the recommended external components for the device. Table 1. Recommended External Components COMPONENT PIN 1 PIN 2 RECOMMENDED CVM1 VM GND 0.1-µF, low ESR ceramic capacitor, VM-rated. CVM2 VM GND Bulk Capacitance, VM-rated. CVCP VCP VM X5R or X7R, 100-nF, 16-V ceramic capacitor CFLY CPH CPL X5R or X7R, 22-nF, VM-rated ceramic capacitor RIMODE IMODE GND See Current Regulation. RPMODE PMODE GND See Control Modes. RnFAULT VCC nFAULT Pullup resistor, IOD ≤ 5-mA RIPROPI IPROPI GND See Current Sensing. 7.3.2 Control Modes The DRV887x family of devices provides three modes to support different control schemes with the EN/IN1 and PH/IN2 pins. The control mode is selected through the PMODE pin with either logic low, logic high, or setting the pin Hi-Z as shown in Table 2. The PMODE pin state is latched when the device is enabled through the nSLEEP pin. The PMODE state can be changed by taking the nSLEEP pin logic low, waiting the tSLEEP time, changing the PMODE pin input, and then enabling the device by taking the nSLEEP pin back logic high. Table 2. PMODE Functions PMODE STATE CONTROL MODE PMODE = Logic Low PH/EN PMODE = Logic High PWM PMODE = Hi-Z Independent Half-Bridge Figure 10. H-Bridge States |
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