L9026 datasheet(24/60 Pages) STMICROELECTRONICS

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7.4

PWM generators

Device has two independent PWM generators, which are defined as “PWM GEN” and “PWM LED” here below.

The two PWM generators can be associated to one or more channels, is possible to configure it with various

frequencies and duty cycle. Both refer to the same base frequency fINT (8 MHz typ.) even if two separate pre-

scalers can be defined.

7.4.1

PWM GEN

The first PWM generator is called PWM GEN. Its frequency pre-scaler can be adjusted using

CFG_1.PWM_DIV_GEN bits to program target frequency and using CFG_2.FR_ADJ bits to modulate fine

adjustments around the target. Configuration of fine adjustment is described in Table 12 while target frequency

setting is reported in Table 13.

Table 12. Adjustment coefficients

CFG_2.FR_ADJ

Absolute delta to fINT divider

00B

0 %

01B

-15 %

10B

+15 %

11B

0 %

The user can set the following parameters to configure the PWM generator:

•

duty cycle (bits PWM_GEN_DC.DUTY_CYCLE)

–

8 configuration bits are available, with 100/255 duty cycle resolution for each LSB

–

The maximum duty cycle achievable is 100% (PWM_GEN_DC.DUTY_CYCLE set to “11111111B”)

–

In case the duty cycle is changed, the next target is applied once the previous PWM period is over

and the new one is started. Once a new target is programmed, the behavior above is valid also if the

current duty is 100% while when the current duty is 0% the new target value is applied immediately.

•

frequency (bits CFG_1.PWM_DIV_GEN)

–

2 configuration bits are available to select the frequency among 4 target values

Table 13. PWM GEN generator available frequencies

CFG_1.PWM_DIV_GEN

PWM frequency

00B

122.5 Hz

01B

245.1 Hz

10B

490.2 Hz

11B

980.4 Hz

•

Channels driven by PWM GEN (PWM_SEL and PWM_MAP registers)

The correct sequence to use the PWM generator is:

•

define the frequency divider through CFG_1.PWM_DIV_GEN bit.

•

define duty cycle control register through PWM_GEN_DC register.

•

set up channel output control through PWM_SEL register (PWM GEN corresponds to 0)

•

define channels driven by PWM selected in PWM_SEL through mapping register PWM_MAP

In order to clarify how to select the source that can drive the channels command, the driving tree with all possible

sources (ie PWM generators, SPI and parallel inputs) is reported in Figure 12.

L9026

Power stages

DS13397 - Rev 9

page 24/60

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