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L99VR035PTR 数据表(PDF) 10 Page - STMicroelectronics |
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L99VR035PTR 数据表(HTML) 10 Page - STMicroelectronics |
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10 / 28 page ![]() 3 Application information Figure 15. Application schematic Vbat VS VO C1 C2 C0 Input ceramic capacitor C2 ≥ 1 μF is necessary for the regulator to operate properly. The other input capacitor C1 can be used as a backup supply for the application. The C0 capacitor, connected to the output pin, is for bypassing to GND the high-frequency noise and it guarantees stability even during sudden line and load variations. Tiny output capacitors reduce board space and BOM cost: stable operation with 2.2 μF capacitor min, 4.7 μF recommended to improve load transient response. 5 Ω ≥ ESR ≥ 10 mΩ. Figure 16. Stability plane 0 1 2 3 4 5 6 7 8 9 10 1 10 100 1000 COUT [μF] UNTESTED AREA STABILITY AREA INSTABILITY AREA Vs = 14 V, Vout = 5 V, Iout = 150 mA 3.1 Voltage regulator The voltage regulator uses a p-channel MOS transistor as a regulating element. With this structure, a very low dropout voltage at current up to IO = 300 mA is obtained. The high-precision of the output voltage (±2%) is obtained with a pretrimmed reference voltage. The voltage regulator automatically adapts its own quiescent current to the output current level. In light load conditions, the quiescent current goes down to Iq_LL = 3.5 µA. L99VR03 operates with reduced input voltage (post regulation) minimizing the internal power dissipation and maximizing the output current. During initial power-up, after a thermal shutdown and a short to ground event, the regulator has a soft start incorporated to control initial current through the pass element and the output capacitor. L99VR03 Applicationinformation DS14803 - Rev 2 page 10/28 |
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